From patchwork Thu Jan 19 22:29:55 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Javier Martinez Canillas X-Patchwork-Id: 9527073 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id A41D66020B for ; Thu, 19 Jan 2017 22:42:33 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9714328531 for ; Thu, 19 Jan 2017 22:42:33 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8BDC428671; Thu, 19 Jan 2017 22:42:33 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3BDBE28531 for ; Thu, 19 Jan 2017 22:42:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753292AbdASWmG (ORCPT ); Thu, 19 Jan 2017 17:42:06 -0500 Received: from ec2-52-27-115-49.us-west-2.compute.amazonaws.com ([52.27.115.49]:48106 "EHLO osg.samsung.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1752446AbdASWmF (ORCPT ); Thu, 19 Jan 2017 17:42:05 -0500 Received: from localhost (localhost [127.0.0.1]) by osg.samsung.com (Postfix) with ESMTP id DAF07A0DE2; Thu, 19 Jan 2017 22:30:37 +0000 (UTC) X-Virus-Scanned: amavisd-new at osg.samsung.com Received: from osg.samsung.com ([127.0.0.1]) by localhost (s-opensource.com [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 9ETTuOFZuuOk; Thu, 19 Jan 2017 22:30:37 +0000 (UTC) Received: from minerva.localdomain (unknown [181.121.136.80]) by osg.samsung.com (Postfix) with ESMTPSA id 4F1E9A1314; Thu, 19 Jan 2017 22:30:31 +0000 (UTC) From: Javier Martinez Canillas To: linux-kernel@vger.kernel.org Cc: Inki Dae , Andi Shyti , Shuah Khan , Marek Szyprowski , Andrzej Hajda , Javier Martinez Canillas , devicetree@vger.kernel.org, Kukjin Kim , Russell King , linux-samsung-soc@vger.kernel.org, Rob Herring , Mark Rutland , Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org Subject: [PATCH 2/2] ARM: dts: exynos: Use correct mfc_pd async-bridge clock for Exynos5420 Date: Thu, 19 Jan 2017 19:29:55 -0300 Message-Id: <1484864995-10679-2-git-send-email-javier@osg.samsung.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1484864995-10679-1-git-send-email-javier@osg.samsung.com> References: <1484864995-10679-1-git-send-email-javier@osg.samsung.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Commit 94aed538e032 ("ARM: dts: exynos: Add async-bridge clock to MFC power domain for Exynos5420") fixed an imprecise external abort error when the MFC registers were tried to be accessed and the needed clock for the asynchronous bridges were gated. But according to the Exynos5420 manual the "Gating AXI clock for MFC" is not CLK_ACLK333 but CLK_MFC. The end effect is the same because CLK_ACLK333 is a parent of CLK_MFC but the correct clock should be used instead. Signed-off-by: Javier Martinez Canillas --- arch/arm/boot/dts/exynos5420.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi index 906a1a42a7ea..ffb148ea91d6 100644 --- a/arch/arm/boot/dts/exynos5420.dtsi +++ b/arch/arm/boot/dts/exynos5420.dtsi @@ -294,7 +294,7 @@ reg = <0x10044060 0x20>; clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MOUT_USER_ACLK333>, - <&clock CLK_ACLK333>; + <&clock CLK_MFC>; clock-names = "oscclk", "clk0","asb0"; #power-domain-cells = <0>; };