Message ID | 1485158175-22342-1-git-send-email-a.hajda@samsung.com (mailing list archive) |
---|---|
State | Superseded |
Headers | show |
Hi Andrzej, On 2017-01-23 08:56, Andrzej Hajda wrote: > Ultra HD modes requires clock ticking at increased rate. > > Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> > --- > arch/arm64/boot/dts/exynos/exynos5433.dtsi | 11 +++++++++++ > 1 file changed, 11 insertions(+) > > diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi > index f120d99..4d28e93 100644 > --- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi > +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi I think that exynos5433-tm2-common.dtsi is a better place for such definitions. They can be also moved to &cmu_disp node to match convention for the clocks configuration used on particular board. > @@ -764,6 +764,17 @@ > clock-names = "pclk", "aclk_decon", "aclk_smmu_decon0x", > "aclk_xiu_decon0x", "pclk_smmu_decon0x", > "sclk_decon_vclk", "sclk_decon_eclk"; > + assigned-clocks = > + <&cmu_mif CLK_MOUT_SCLK_DECON_TV_ECLK_A>, > + <&cmu_mif CLK_DIV_SCLK_DECON_TV_ECLK>, > + <&cmu_disp CLK_MOUT_SCLK_DECON_TV_ECLK_USER>, > + <&cmu_disp CLK_MOUT_SCLK_DECON_TV_ECLK>; > + assigned-clock-parents = > + <&cmu_mif CLK_MOUT_BUS_PLL_DIV2>, > + <0>, > + <&cmu_mif CLK_SCLK_DECON_TV_ECLK_DISP>, > + <&cmu_disp CLK_MOUT_SCLK_DECON_TV_ECLK_USER>; > + assigned-clock-rates = <0>, <400000000>; > samsung,disp-sysreg = <&syscon_disp>; > interrupt-names = "fifo", "vsync", "lcd_sys"; > interrupts = <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, Best regards
diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi index f120d99..4d28e93 100644 --- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi @@ -764,6 +764,17 @@ clock-names = "pclk", "aclk_decon", "aclk_smmu_decon0x", "aclk_xiu_decon0x", "pclk_smmu_decon0x", "sclk_decon_vclk", "sclk_decon_eclk"; + assigned-clocks = + <&cmu_mif CLK_MOUT_SCLK_DECON_TV_ECLK_A>, + <&cmu_mif CLK_DIV_SCLK_DECON_TV_ECLK>, + <&cmu_disp CLK_MOUT_SCLK_DECON_TV_ECLK_USER>, + <&cmu_disp CLK_MOUT_SCLK_DECON_TV_ECLK>; + assigned-clock-parents = + <&cmu_mif CLK_MOUT_BUS_PLL_DIV2>, + <0>, + <&cmu_mif CLK_SCLK_DECON_TV_ECLK_DISP>, + <&cmu_disp CLK_MOUT_SCLK_DECON_TV_ECLK_USER>; + assigned-clock-rates = <0>, <400000000>; samsung,disp-sysreg = <&syscon_disp>; interrupt-names = "fifo", "vsync", "lcd_sys"; interrupts = <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
Ultra HD modes requires clock ticking at increased rate. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> --- arch/arm64/boot/dts/exynos/exynos5433.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+)