diff mbox

[2/8] arm64: dts: exynos: Add GSCL power domain to Exynos 5433 SoC

Message ID 1485345342-3273-3-git-send-email-m.szyprowski@samsung.com (mailing list archive)
State Changes Requested
Headers show

Commit Message

Marek Szyprowski Jan. 25, 2017, 11:55 a.m. UTC
This patch adds support for GSCL power domain to Exynos 5433 SoCs, which
contains following devices: a clock controller, three GSCL video scalers and
their SYSMMUs.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
---
 arch/arm64/boot/dts/exynos/exynos5433.dtsi | 13 +++++++++++++
 1 file changed, 13 insertions(+)

Comments

Krzysztof Kozlowski Jan. 27, 2017, 7:46 a.m. UTC | #1
On Wed, Jan 25, 2017 at 12:55:36PM +0100, Marek Szyprowski wrote:
> This patch adds support for GSCL power domain to Exynos 5433 SoCs, which
> contains following devices: a clock controller, three GSCL video scalers and
> their SYSMMUs.
> 
> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
> ---
>  arch/arm64/boot/dts/exynos/exynos5433.dtsi | 13 +++++++++++++
>  1 file changed, 13 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
> index 16072c1c3ed3..74c767d756ac 100644
> --- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
> +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
> @@ -425,6 +425,7 @@
>  			clocks = <&xxti>,
>  				<&cmu_top CLK_ACLK_GSCL_111>,
>  				<&cmu_top CLK_ACLK_GSCL_333>;
> +			power-domains = <&pd_gscl>;
>  		};
>  
>  		cmu_apollo: clock-controller@11900000 {
> @@ -525,6 +526,12 @@
>  				<&cmu_top CLK_ACLK_CAM1_552>;
>  		};
>  
> +		pd_gscl: gscl-power-domain@105c4000 {

The name of node: just "power-domain". This should be generic class of
device (following ePAPR).

The same applies to other patches.

Best regards,
Krzysztof

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Marek Szyprowski Jan. 27, 2017, 10:33 a.m. UTC | #2
Hi Krzysztof,

On 2017-01-27 08:46, Krzysztof Kozlowski wrote:
> On Wed, Jan 25, 2017 at 12:55:36PM +0100, Marek Szyprowski wrote:
>> This patch adds support for GSCL power domain to Exynos 5433 SoCs, which
>> contains following devices: a clock controller, three GSCL video scalers and
>> their SYSMMUs.
>>
>> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
>> ---
>>   arch/arm64/boot/dts/exynos/exynos5433.dtsi | 13 +++++++++++++
>>   1 file changed, 13 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
>> index 16072c1c3ed3..74c767d756ac 100644
>> --- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
>> +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
>> @@ -425,6 +425,7 @@
>>   			clocks = <&xxti>,
>>   				<&cmu_top CLK_ACLK_GSCL_111>,
>>   				<&cmu_top CLK_ACLK_GSCL_333>;
>> +			power-domains = <&pd_gscl>;
>>   		};
>>   
>>   		cmu_apollo: clock-controller@11900000 {
>> @@ -525,6 +526,12 @@
>>   				<&cmu_top CLK_ACLK_CAM1_552>;
>>   		};
>>   
>> +		pd_gscl: gscl-power-domain@105c4000 {
> The name of node: just "power-domain". This should be generic class of
> device (following ePAPR).
>
> The same applies to other patches.

Well, this makes the debugging much harder, but I will change it to generic
names. Also existing Exynos dtsi should be fixed in this area (Exynos4 still
use such more descriptive names). I will check how hard is to add real
domain names directly to the Exynos power domain driver then.

Best regards
Krzysztof Kozlowski Jan. 27, 2017, 11:28 a.m. UTC | #3
On Fri, Jan 27, 2017 at 11:33:36AM +0100, Marek Szyprowski wrote:
> Hi Krzysztof,
> 
> On 2017-01-27 08:46, Krzysztof Kozlowski wrote:
> > On Wed, Jan 25, 2017 at 12:55:36PM +0100, Marek Szyprowski wrote:
> > > This patch adds support for GSCL power domain to Exynos 5433 SoCs, which
> > > contains following devices: a clock controller, three GSCL video scalers and
> > > their SYSMMUs.
> > > 
> > > Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
> > > ---
> > >   arch/arm64/boot/dts/exynos/exynos5433.dtsi | 13 +++++++++++++
> > >   1 file changed, 13 insertions(+)
> > > 
> > > diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
> > > index 16072c1c3ed3..74c767d756ac 100644
> > > --- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
> > > +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
> > > @@ -425,6 +425,7 @@
> > >   			clocks = <&xxti>,
> > >   				<&cmu_top CLK_ACLK_GSCL_111>,
> > >   				<&cmu_top CLK_ACLK_GSCL_333>;
> > > +			power-domains = <&pd_gscl>;
> > >   		};
> > >   		cmu_apollo: clock-controller@11900000 {
> > > @@ -525,6 +526,12 @@
> > >   				<&cmu_top CLK_ACLK_CAM1_552>;
> > >   		};
> > > +		pd_gscl: gscl-power-domain@105c4000 {
> > The name of node: just "power-domain". This should be generic class of
> > device (following ePAPR).
> > 
> > The same applies to other patches.
> 
> Well, this makes the debugging much harder, but I will change it to generic
> names.

Good point. I remember some patch from Javier trying to address this but
I cannot find it anymore.

Anyway, I don't think power-domains should be treated here differently
then rest of devices (which have generic names: clock-controller,
pinctrl, i2s, i2c etc).

> Also existing Exynos dtsi should be fixed in this area (Exynos4 still
> use such more descriptive names).

I am trying to bring some shape to new code but of course you are right
- old code should be adjusted as well (maybe as part of some bigger
  cleanup). Exynos5420 uses short/generic names.

> I will check how hard is to add real
> domain names directly to the Exynos power domain driver then.

Thanks!

Krzysztof
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diff mbox

Patch

diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
index 16072c1c3ed3..74c767d756ac 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
@@ -425,6 +425,7 @@ 
 			clocks = <&xxti>,
 				<&cmu_top CLK_ACLK_GSCL_111>,
 				<&cmu_top CLK_ACLK_GSCL_333>;
+			power-domains = <&pd_gscl>;
 		};
 
 		cmu_apollo: clock-controller@11900000 {
@@ -525,6 +526,12 @@ 
 				<&cmu_top CLK_ACLK_CAM1_552>;
 		};
 
+		pd_gscl: gscl-power-domain@105c4000 {
+			compatible = "samsung,exynos5433-pd";
+			reg = <0x105c4000 0x20>;
+			#power-domain-cells = <0>;
+		};
+
 		tmu_atlas0: tmu@10060000 {
 			compatible = "samsung,exynos5433-tmu";
 			reg = <0x10060000 0x200>;
@@ -892,6 +899,7 @@ 
 				 <&cmu_gscl CLK_ACLK_XIU_GSCLX>,
 				 <&cmu_gscl CLK_ACLK_GSCLBEND_333>;
 			iommus = <&sysmmu_gscl0>;
+			power-domains = <&pd_gscl>;
 		};
 
 		gsc_1: video-scaler@13C10000 {
@@ -905,6 +913,7 @@ 
 				 <&cmu_gscl CLK_ACLK_XIU_GSCLX>,
 				 <&cmu_gscl CLK_ACLK_GSCLBEND_333>;
 			iommus = <&sysmmu_gscl1>;
+			power-domains = <&pd_gscl>;
 		};
 
 		gsc_2: video-scaler@13C20000 {
@@ -918,6 +927,7 @@ 
 				 <&cmu_gscl CLK_ACLK_XIU_GSCLX>,
 				 <&cmu_gscl CLK_ACLK_GSCLBEND_333>;
 			iommus = <&sysmmu_gscl2>;
+			power-domains = <&pd_gscl>;
 		};
 
 		jpeg: codec@15020000 {
@@ -992,6 +1002,7 @@ 
 			clocks = <&cmu_gscl CLK_ACLK_SMMU_GSCL0>,
 				 <&cmu_gscl CLK_PCLK_SMMU_GSCL0>;
 			#iommu-cells = <0>;
+			power-domains = <&pd_gscl>;
 		};
 
 		sysmmu_gscl1: sysmmu@13c90000 {
@@ -1002,6 +1013,7 @@ 
 			clocks = <&cmu_gscl CLK_ACLK_SMMU_GSCL1>,
 				 <&cmu_gscl CLK_PCLK_SMMU_GSCL1>;
 			#iommu-cells = <0>;
+			power-domains = <&pd_gscl>;
 		};
 
 		sysmmu_gscl2: sysmmu@13ca0000 {
@@ -1012,6 +1024,7 @@ 
 			clocks = <&cmu_gscl CLK_ACLK_SMMU_GSCL2>,
 				 <&cmu_gscl CLK_PCLK_SMMU_GSCL2>;
 			#iommu-cells = <0>;
+			power-domains = <&pd_gscl>;
 		};
 
 		sysmmu_jpeg: sysmmu@15060000 {