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Thu, 26 Jan 2017 09:30:05 +0000 (GMT) Received: from eusmgms1.samsung.com (unknown [182.198.249.179]) by eucas1p2.samsung.com (KnoxPortal) with ESMTP id 20170126093002eucas1p242ce2fc9c907f515d60e353076bf8214~dSFnH195D1106611066eucas1p2O; Thu, 26 Jan 2017 09:30:02 +0000 (GMT) X-AuditID: cbfec7ef-f79d26d00000420c-cd-5889c19d5892 Received: from eusync3.samsung.com ( [203.254.199.213]) by eusmgms1.samsung.com (EUCPMTA) with SMTP id 0D.FC.06687.AD1C9885; Thu, 26 Jan 2017 09:31:06 +0000 (GMT) Received: from AMDC2765.digital.local ([106.116.147.25]) by eusync3.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0OKD007J9RPVXW40@eusync3.samsung.com>; Thu, 26 Jan 2017 09:30:02 +0000 (GMT) From: Marek Szyprowski To: linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org, linux-samsung-soc@vger.kernel.org Cc: Marek Szyprowski , Sylwester Nawrocki , Krzysztof Kozlowski , Linus Walleij , Tomasz Figa , Bartlomiej Zolnierkiewicz Subject: [PATCH v3 REBASED 12/13] pinctrl: samsung: Move retention control from mach-s5pv210 to the pinctrl driver Date: Thu, 26 Jan 2017 10:29:26 +0100 Message-id: <1485422967-30643-9-git-send-email-m.szyprowski@samsung.com> X-Mailer: git-send-email 1.9.1 In-reply-to: <1485422967-30643-1-git-send-email-m.szyprowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrFIsWRmVeSWpSXmKPExsWy7djPc7pzD3ZGGHxeo2qxccZ6Vovz5zew W0z5s5zJYtPja6wWm+f/YbT43HuE0WLG+X1MFmuP3GW3OPymndVi1a4/jA5cHjtn3WX32LSq k83jzrU9bB6bl9R79G1ZxejxeZNcAFsUl01Kak5mWWqRvl0CV8btmy/ZC/4rVdyeuoq9gXGv bBcjJ4eEgInE4W2tjBC2mMSFe+vZuhi5OIQEljFKbHm4kRXC+cwocW/lQeYuRg6wjrfzFUAa wIoWf7KEqGlgkpi5/SEbSIJNwFCi620X2CQRgWZGiZl397KDOMwCfUwSnzfvZQSZJCxQInGq mxukgUVAVeL9rHesIDavgIdEw7pHUCfJSZw8NhkszingKbG/aRs7RHwyu8T/5wEQB8lKbDrA DBF2kejc/J8NwhaWeHV8C1S5jERnx0EmCLufUaKpVRvCnsEoce4tL4RtLXH4+EWwVcwCfBKT tk2H+pdXoqNNCKLEQ2L+5J9QYxwltv77wg7x+2NGiXfTO9kmMMosYGRYxSiSWlqcm55abKhX nJhbXJqXrpecn7uJERjjp/8df7+D8WlzyCFGAQ5GJR7eAzs6IoRYE8uKK3MPMUpwMCuJ8B7a 1xkhxJuSWFmVWpQfX1Sak1p8iFGag0VJnHfvgivhQgLpiSWp2ampBalFMFkmDk6pBkajnbUt TQ73Py3+7Dm7Kl+cxcZy/s8/S4JU4xVrjyfMrc1fcVZoj7pdzu9Dvm6bGPZ5XOk6mVRVdfTf 7w9Gtq8MV6wotlA5LB2bob5wxvNZhsJrD/5fn7j9ijnn7sn/4mbPZlIpm7I+0i1vxa3Eu2vm frwarFeQUGI8m7uv2Cb2h7mg7hVptnIlluKMREMt5qLiRAC5BNnH7QIAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrLLMWRmVeSWpSXmKPExsVy+t/xq7q3DnZGGMxtk7PYOGM9q8X58xvY Lab8Wc5ksenxNVaLzfP/MFp87j3CaDHj/D4mi7VH7rJbHH7TzmqxatcfRgcuj52z7rJ7bFrV yeZx59oeNo/NS+o9+rasYvT4vEkugC3KzSYjNTEltUghNS85PyUzL91WKTTETddCSSEvMTfV VilC1zckSEmhLDGnFMgzMkADDs4B7sFK+nYJbhm3b75kL/ivVHF76ir2Bsa9sl2MHBwSAiYS b+crdDFyApliEhfurWfrYuTiEBJYwigxa986RginiUlixqQ9bCBVbAKGEl1vu8CqRASaGSUa lvSCOcwCE5gkZn5qYAKpEhYokVjyajmYzSKgKvF+1jtWEJtXwEOiYd0jRoh9chInj00Gi3MK eErsb9rGDmILCUxklDg6O3sCI+8CRoZVjCKppcW56bnFhnrFibnFpXnpesn5uZsYgUG/7djP zTsYL20MPsQowMGoxMN7YEdHhBBrYllxZe4hRgkOZiUR3kP7OiOEeFMSK6tSi/Lji0pzUosP MZoCHTWRWUo0OR8YkXkl8YYmhuaWhkbGFhbmRkZK4rwlH66ECwmkJ5akZqemFqQWwfQxcXBK NTDKxPTtY9vQvNg/sPvUd0PJzHVeU6ev+3cxqOWXQ94j7a05hVPi3DRPme0/svyvze2D1lY2 e6P/XLZcclMsls9GqCFGf47phgdKwm+/PVH3ryxZqrTvdP/yoB2eAhWTFr0usCl4t6u0Kdlg 8iuNORqOre1WE6zmxjNM2mg85UlqvoOYVtNU9W1KLMUZiYZazEXFiQAB0J2JkAIAAA== X-MTR: 20000000000000000@CPGS X-CMS-MailID: 20170126093002eucas1p242ce2fc9c907f515d60e353076bf8214 X-Msg-Generator: CA X-Sender-IP: 182.198.249.179 X-Local-Sender: =?UTF-8?B?TWFyZWsgU3p5cHJvd3NraRtTUlBPTC1LZXJuZWwgKFRQKRs=?= =?UTF-8?B?7IK87ISx7KCE7J6QG1NlbmlvciBTb2Z0d2FyZSBFbmdpbmVlcg==?= X-Global-Sender: =?UTF-8?B?TWFyZWsgU3p5cHJvd3NraRtTUlBPTC1LZXJuZWwgKFRQKRtT?= =?UTF-8?B?YW1zdW5nIEVsZWN0cm9uaWNzG1NlbmlvciBTb2Z0d2FyZSBFbmdpbmVlcg==?= X-Sender-Code: =?UTF-8?B?QzEwG0VIURtDMTBDRDAyQ0QwMjczOTI=?= CMS-TYPE: 201P X-HopCount: 7 X-CMS-RootMailID: 20170126093002eucas1p242ce2fc9c907f515d60e353076bf8214 X-RootMTR: 20170126093002eucas1p242ce2fc9c907f515d60e353076bf8214 References: <1485422967-30643-1-git-send-email-m.szyprowski@samsung.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch moves pad retention control from S5PV210 machine code to Exynos pin controller driver. This helps to avoid possible ordering and logical dependencies between machine and pin control code. Till now it worked fine only because sys_ops for machine code and pin controller were called in registration order. Signed-off-by: Marek Szyprowski Acked-by: Tomasz Figa For mach-s5pv210: Acked-by: Krzysztof Kozlowski --- arch/arm/mach-s5pv210/pm.c | 7 ---- arch/arm/mach-s5pv210/regs-clock.h | 4 --- drivers/pinctrl/samsung/pinctrl-exynos.c | 56 ++++++++++++++++++++++++++++++++ 3 files changed, 56 insertions(+), 11 deletions(-) diff --git a/arch/arm/mach-s5pv210/pm.c b/arch/arm/mach-s5pv210/pm.c index 21b4b13c5ab7..7d69666de5ba 100644 --- a/arch/arm/mach-s5pv210/pm.c +++ b/arch/arm/mach-s5pv210/pm.c @@ -155,13 +155,6 @@ static void s5pv210_suspend_finish(void) */ static void s5pv210_pm_resume(void) { - u32 tmp; - - tmp = __raw_readl(S5P_OTHERS); - tmp |= (S5P_OTHERS_RET_IO | S5P_OTHERS_RET_CF |\ - S5P_OTHERS_RET_MMC | S5P_OTHERS_RET_UART); - __raw_writel(tmp , S5P_OTHERS); - s3c_pm_do_restore_core(s5pv210_core_save, ARRAY_SIZE(s5pv210_core_save)); } diff --git a/arch/arm/mach-s5pv210/regs-clock.h b/arch/arm/mach-s5pv210/regs-clock.h index 4640f0f03c12..fb3eb77412db 100644 --- a/arch/arm/mach-s5pv210/regs-clock.h +++ b/arch/arm/mach-s5pv210/regs-clock.h @@ -188,10 +188,6 @@ #define S5P_SLEEP_CFG_USBOSC_EN (1 << 1) /* OTHERS Resgister */ -#define S5P_OTHERS_RET_IO (1 << 31) -#define S5P_OTHERS_RET_CF (1 << 30) -#define S5P_OTHERS_RET_MMC (1 << 29) -#define S5P_OTHERS_RET_UART (1 << 28) #define S5P_OTHERS_USB_SIG_MASK (1 << 16) /* S5P_DAC_CONTROL */ diff --git a/drivers/pinctrl/samsung/pinctrl-exynos.c b/drivers/pinctrl/samsung/pinctrl-exynos.c index c81df3c843c3..f16f52ab4912 100644 --- a/drivers/pinctrl/samsung/pinctrl-exynos.c +++ b/drivers/pinctrl/samsung/pinctrl-exynos.c @@ -24,6 +24,7 @@ #include #include #include +#include #include #include #include @@ -632,6 +633,60 @@ static void exynos_pinctrl_resume(struct samsung_pinctrl_drv_data *drvdata) exynos_pinctrl_resume_bank(drvdata, bank); } +/* Retention control for S5PV210 are located at the end of clock controller */ +#define S5P_OTHERS 0xE000 + +#define S5P_OTHERS_RET_IO (1 << 31) +#define S5P_OTHERS_RET_CF (1 << 30) +#define S5P_OTHERS_RET_MMC (1 << 29) +#define S5P_OTHERS_RET_UART (1 << 28) + +static void s5pv210_retention_disable(struct samsung_pinctrl_drv_data *drvdata) +{ + void *clk_base = drvdata->retention_ctrl->priv; + u32 tmp; + + tmp = __raw_readl(clk_base + S5P_OTHERS); + tmp |= (S5P_OTHERS_RET_IO | S5P_OTHERS_RET_CF | S5P_OTHERS_RET_MMC | + S5P_OTHERS_RET_UART); + __raw_writel(tmp, clk_base + S5P_OTHERS); +} + +static struct samsung_retention_ctrl * +s5pv210_retention_init(struct samsung_pinctrl_drv_data *drvdata, + const struct samsung_retention_data *data) +{ + struct samsung_retention_ctrl *ctrl; + struct device_node *np; + void *clk_base; + + ctrl = devm_kzalloc(drvdata->dev, sizeof(*ctrl), GFP_KERNEL); + if (!ctrl) + return ERR_PTR(-ENOMEM); + + np = of_find_compatible_node(NULL, NULL, "samsung,s5pv210-clock"); + if (!np) { + pr_err("%s: failed to find clock controller DT node\n", + __func__); + return ERR_PTR(-ENODEV); + } + + clk_base = of_iomap(np, 0); + if (!clk_base) { + pr_err("%s: failed to map clock registers\n", __func__); + return ERR_PTR(-EINVAL); + } + + ctrl->priv = clk_base; + ctrl->disable = s5pv210_retention_disable; + + return ctrl; +} + +static const struct samsung_retention_data s5pv210_retention_data __initconst = { + .init = s5pv210_retention_init, +}; + /* pin banks of s5pv210 pin-controller */ static const struct samsung_pin_bank_data s5pv210_pin_bank[] __initconst = { EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpa0", 0x00), @@ -679,6 +734,7 @@ static void exynos_pinctrl_resume(struct samsung_pinctrl_drv_data *drvdata) .eint_wkup_init = exynos_eint_wkup_init, .suspend = exynos_pinctrl_suspend, .resume = exynos_pinctrl_resume, + .retention_data = &s5pv210_retention_data, }, };