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Tue, 14 Feb 2017 07:52:23 +0000 (GMT) Received: from eusmgms1.samsung.com (unknown [182.198.249.179]) by eucas1p1.samsung.com (KnoxPortal) with ESMTP id 20170214075220eucas1p1451535e571c481c69aacec705a782c09~jGAuuwChf2142721427eucas1p1k; Tue, 14 Feb 2017 07:52:20 +0000 (GMT) X-AuditID: cbfec7ef-f79d26d00000420c-09-58a2b73738e0 Received: from eusync2.samsung.com ( [203.254.199.212]) by eusmgms1.samsung.com (EUCPMTA) with SMTP id 51.6E.06687.387B2A85; Tue, 14 Feb 2017 07:53:39 +0000 (GMT) Received: from AMDC2765.digital.local ([106.116.147.25]) by eusync2.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0OLC00FWGTUYP980@eusync2.samsung.com>; Tue, 14 Feb 2017 07:52:20 +0000 (GMT) From: Marek Szyprowski To: linux-media@vger.kernel.org, linux-samsung-soc@vger.kernel.org Cc: Marek Szyprowski , Sylwester Nawrocki , Andrzej Hajda , Krzysztof Kozlowski , Inki Dae , Seung-Woo Kim Subject: [PATCH 13/15] media: s5p-mfc: Remove special configuration of IOMMU domain Date: Tue, 14 Feb 2017 08:52:06 +0100 Message-id: <1487058728-16501-14-git-send-email-m.szyprowski@samsung.com> X-Mailer: git-send-email 1.9.1 In-reply-to: <1487058728-16501-1-git-send-email-m.szyprowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrEIsWRmVeSWpSXmKPExsWy7djPc7rm2xdFGLxYqGBxa905VotJ9yew WJw/v4HdomfDVlaLGef3MVmsPXKX3eLwm3Ygd/JLNgcOj02rOtk8+rasYvT4vEkugDmKyyYl NSezLLVI3y6BK+PE3yNsBTN0Kqb++8bcwPhUpYuRk0NCwERi0sb5jBC2mMSFe+vZuhi5OIQE ljFK7Dm5kRnC+cwo0f3yFStMx7lpa5jhqt6/WAflNDBJnN21kgWkik3AUKLrbRcbiC0i4CSx cNZfdpAiZoHvjBLfdp8GGsXBISwQKvFrcgqIySKgKvFmZxZIOa+Ap8S5k2eZIZbJSZw8Nhls MSdQfNPnKYwgYyQEnrNJPD7wkgmkV0JAVmLTAah6F4kFh7YxQdjCEq+Ob2GHsGUkOjsOQsX7 GSWaWrUh7BmMEufe8kLY1hKHj18E28UswCcxadt0ZojxvBIdbUIQJR4S05fPYIEIO0o0zq2C +HwOo0Tn52/MExhlFjAyrGIUSS0tzk1PLTbUK07MLS7NS9dLzs/dxAiM2dP/jr/fwfi0OeQQ owAHoxIP74QDCyOEWBPLiitzDzFKcDArifAy9C6KEOJNSaysSi3Kjy8qzUktPsQozcGiJM67 d8GVcCGB9MSS1OzU1ILUIpgsEwenVAOj6jR3jx3/Jx11jvz8Xv1ZvZfaM88PvUdq1gfNcnU4 ejDp+AnpA4tvqdYu8j6qOieFNUHM7tx690RJvdi39sdsJ7iUBDjPX7xPh5v71DF+tchL72pU VeecOHhjhnI19/m4+V9Kt1ww7SnR+b5ciHnZtU9+34u+L5Eut3i/YLaaTdQeMa6JZW0PlFiK MxINtZiLihMBZchixdUCAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrELMWRmVeSWpSXmKPExsVy+t/xK7rN2xdFGHRukrK4te4cq8Wk+xNY LM6f38Bu0bNhK6vFjPP7mCzWHrnLbnH4TTuQO/klmwOHx6ZVnWwefVtWMXp83iQXwBzlZpOR mpiSWqSQmpecn5KZl26rFBripmuhpJCXmJtqqxSh6xsSpKRQlphTCuQZGaABB+cA92AlfbsE t4wTf4+wFczQqZj67xtzA+NTlS5GTg4JAROJc9PWMEPYYhIX7q1n62Lk4hASWMIosX/SLHYI p4lJ4v/7i+wgVWwChhJdb7vYQGwRASeJhbP+gsWZBb4zSiy7mdbFyMEhLBAq8WtyCojJIqAq 8WZnFkgFr4CnxLmTZ6F2yUmcPDaZFcTmBIpv+jyFEcQWEvCQOLtmB/sERt4FjAyrGEVSS4tz 03OLDfWKE3OLS/PS9ZLzczcxAsN327Gfm3cwXtoYfIhRgINRiYd3woGFEUKsiWXFlbmHGCU4 mJVEeBl6F0UI8aYkVlalFuXHF5XmpBYfYjQFumkis5Rocj4wtvJK4g1NDM0tDY2MLSzMjYyU xHlLPlwJFxJITyxJzU5NLUgtgulj4uCUamBse77HuHzF+nlLxdvilbYe/OinFGOW2RQZl3PH /ZmfcdGFZyJuym/PneQ0qY4qDq8z2S13Kbei8rXktt3dXz8me3/19zh/1ri/6m+GtW3GjUA/ hryeaFbZj+EvChx/vMqdWSK8qFfhpZ0bZ+stDrldW9a3Fkx+ydE1PTnp12yRQ8UZAZHvkpVY ijMSDbWYi4oTAUN6qmV1AgAA X-MTR: 20000000000000000@CPGS X-CMS-MailID: 20170214075220eucas1p1451535e571c481c69aacec705a782c09 X-Msg-Generator: CA X-Sender-IP: 182.198.249.179 X-Local-Sender: =?UTF-8?B?TWFyZWsgU3p5cHJvd3NraRtTUlBPTC1LZXJuZWwgKFRQKRs=?= =?UTF-8?B?7IK87ISx7KCE7J6QG1NlbmlvciBTb2Z0d2FyZSBFbmdpbmVlcg==?= X-Global-Sender: =?UTF-8?B?TWFyZWsgU3p5cHJvd3NraRtTUlBPTC1LZXJuZWwgKFRQKRtT?= =?UTF-8?B?YW1zdW5nIEVsZWN0cm9uaWNzG1NlbmlvciBTb2Z0d2FyZSBFbmdpbmVlcg==?= X-Sender-Code: =?UTF-8?B?QzEwG0VIURtDMTBDRDAyQ0QwMjczOTI=?= CMS-TYPE: 201P X-HopCount: 7 X-CMS-RootMailID: 20170214075220eucas1p1451535e571c481c69aacec705a782c09 X-RootMTR: 20170214075220eucas1p1451535e571c481c69aacec705a782c09 References: <1487058728-16501-1-git-send-email-m.szyprowski@samsung.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The main reason for using special configuration of IOMMU domain was the problem with MFC firmware, which failed to operate properly when placed at 0 DMA address. Instead of adding custom code for configuring each variant of IOMMU domain and architecture specific glue code, simply use what arch code provides and if the DMA base address equals zero, skip first 128 KiB to keep required alignment. This patch also make the driver operational on ARM64 architecture, because it no longer depends on ARM specific DMA-mapping and IOMMU glue code functions. Signed-off-by: Marek Szyprowski Reviewed-by: Javier Martinez Canillas Tested-by: Javier Martinez Canillas --- drivers/media/platform/s5p-mfc/s5p_mfc.c | 30 +++++++-------- drivers/media/platform/s5p-mfc/s5p_mfc_iommu.h | 51 +------------------------- 2 files changed, 14 insertions(+), 67 deletions(-) diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc.c b/drivers/media/platform/s5p-mfc/s5p_mfc.c index 7492e81fde6d..8fc6fe4ba087 100644 --- a/drivers/media/platform/s5p-mfc/s5p_mfc.c +++ b/drivers/media/platform/s5p-mfc/s5p_mfc.c @@ -1180,18 +1180,6 @@ static int s5p_mfc_configure_common_memory(struct s5p_mfc_dev *mfc_dev) struct device *dev = &mfc_dev->plat_dev->dev; unsigned long mem_size = SZ_8M; unsigned int bitmap_size; - /* - * When IOMMU is available, we cannot use the default configuration, - * because of MFC firmware requirements: address space limited to - * 256M and non-zero default start address. - * This is still simplified, not optimal configuration, but for now - * IOMMU core doesn't allow to configure device's IOMMUs channel - * separately. - */ - int ret = exynos_configure_iommu(dev, S5P_MFC_IOMMU_DMA_BASE, - S5P_MFC_IOMMU_DMA_SIZE); - if (ret) - return ret; if (mfc_mem_size) mem_size = memparse(mfc_mem_size, NULL); @@ -1199,10 +1187,8 @@ static int s5p_mfc_configure_common_memory(struct s5p_mfc_dev *mfc_dev) bitmap_size = BITS_TO_LONGS(mem_size >> PAGE_SHIFT) * sizeof(long); mfc_dev->mem_bitmap = kzalloc(bitmap_size, GFP_KERNEL); - if (!mfc_dev->mem_bitmap) { - exynos_unconfigure_iommu(dev); + if (!mfc_dev->mem_bitmap) return -ENOMEM; - } mfc_dev->mem_virt = dma_alloc_coherent(dev, mem_size, &mfc_dev->mem_base, GFP_KERNEL); @@ -1210,13 +1196,24 @@ static int s5p_mfc_configure_common_memory(struct s5p_mfc_dev *mfc_dev) kfree(mfc_dev->mem_bitmap); dev_err(dev, "failed to preallocate %ld MiB for the firmware and context buffers\n", (mem_size / SZ_1M)); - exynos_unconfigure_iommu(dev); return -ENOMEM; } mfc_dev->mem_size = mem_size; mfc_dev->dma_base[BANK1_CTX] = mfc_dev->mem_base; mfc_dev->dma_base[BANK2_CTX] = mfc_dev->mem_base; + /* + * MFC hardware cannot handle 0 as a base address, so mark first 128K + * as used (to keep required base alignment) and adjust base address + */ + if (mfc_dev->mem_base == (dma_addr_t)0) { + unsigned int offset = 1 << MFC_BASE_ALIGN_ORDER; + + bitmap_set(mfc_dev->mem_bitmap, 0, offset >> PAGE_SHIFT); + mfc_dev->dma_base[BANK1_CTX] += offset; + mfc_dev->dma_base[BANK2_CTX] += offset; + } + /* Firmware allocation cannot fail in this case */ s5p_mfc_alloc_firmware(mfc_dev); @@ -1233,7 +1230,6 @@ static void s5p_mfc_unconfigure_common_memory(struct s5p_mfc_dev *mfc_dev) { struct device *dev = &mfc_dev->plat_dev->dev; - exynos_unconfigure_iommu(dev); dma_free_coherent(dev, mfc_dev->mem_size, mfc_dev->mem_virt, mfc_dev->mem_base); kfree(mfc_dev->mem_bitmap); diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_iommu.h b/drivers/media/platform/s5p-mfc/s5p_mfc_iommu.h index 6962132ae8fa..76667924ee2a 100644 --- a/drivers/media/platform/s5p-mfc/s5p_mfc_iommu.h +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_iommu.h @@ -11,54 +11,13 @@ #ifndef S5P_MFC_IOMMU_H_ #define S5P_MFC_IOMMU_H_ -#define S5P_MFC_IOMMU_DMA_BASE 0x20000000lu -#define S5P_MFC_IOMMU_DMA_SIZE SZ_256M - -#if defined(CONFIG_EXYNOS_IOMMU) && defined(CONFIG_ARM_DMA_USE_IOMMU) - -#include +#if defined(CONFIG_EXYNOS_IOMMU) static inline bool exynos_is_iommu_available(struct device *dev) { return dev->archdata.iommu != NULL; } -static inline void exynos_unconfigure_iommu(struct device *dev) -{ - struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev); - - arm_iommu_detach_device(dev); - arm_iommu_release_mapping(mapping); -} - -static inline int exynos_configure_iommu(struct device *dev, - unsigned int base, unsigned int size) -{ - struct dma_iommu_mapping *mapping = NULL; - int ret; - - /* Disable the default mapping created by device core */ - if (to_dma_iommu_mapping(dev)) - exynos_unconfigure_iommu(dev); - - mapping = arm_iommu_create_mapping(dev->bus, base, size); - if (IS_ERR(mapping)) { - pr_warn("Failed to create IOMMU mapping for device %s\n", - dev_name(dev)); - return PTR_ERR(mapping); - } - - ret = arm_iommu_attach_device(dev, mapping); - if (ret) { - pr_warn("Failed to attached device %s to IOMMU_mapping\n", - dev_name(dev)); - arm_iommu_release_mapping(mapping); - return ret; - } - - return 0; -} - #else static inline bool exynos_is_iommu_available(struct device *dev) @@ -66,14 +25,6 @@ static inline bool exynos_is_iommu_available(struct device *dev) return false; } -static inline int exynos_configure_iommu(struct device *dev, - unsigned int base, unsigned int size) -{ - return -ENOSYS; -} - -static inline void exynos_unconfigure_iommu(struct device *dev) { } - #endif #endif /* S5P_MFC_IOMMU_H_ */