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Mon, 20 Feb 2017 13:39:14 +0000 (GMT) Received: from eusmgms2.samsung.com (unknown [182.198.249.180]) by eucas1p1.samsung.com (KnoxPortal) with ESMTP id 20170220133914eucas1p1ed7898e67e5d580742875aceaac278e6~lAnVER-OR3062830628eucas1p1X; Mon, 20 Feb 2017 13:39:14 +0000 (GMT) X-AuditID: cbfec7f2-f790f6d000002555-c7-58aaf182a707 Received: from eusync1.samsung.com ( [203.254.199.211]) by eusmgms2.samsung.com (EUCPMTA) with SMTP id 77.FA.10233.881FAA85; Mon, 20 Feb 2017 13:39:20 +0000 (GMT) Received: from AMDC2765.digital.local ([106.116.147.25]) by eusync1.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0OLO00HBFDX6PK30@eusync1.samsung.com>; Mon, 20 Feb 2017 13:39:14 +0000 (GMT) From: Marek Szyprowski To: linux-media@vger.kernel.org, linux-samsung-soc@vger.kernel.org Cc: Marek Szyprowski , Sylwester Nawrocki , Andrzej Hajda , Krzysztof Kozlowski , Inki Dae , Seung-Woo Kim Subject: [PATCH v2 08/15] media: s5p-mfc: Move firmware allocation to DMA configure function Date: Mon, 20 Feb 2017 14:38:57 +0100 Message-id: <1487597944-2000-9-git-send-email-m.szyprowski@samsung.com> X-Mailer: git-send-email 1.9.1 In-reply-to: <1487597944-2000-1-git-send-email-m.szyprowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrIIsWRmVeSWpSXmKPExsWy7djP87pNH1dFGCy+Z2Vxa905VotJ9yew WJw/v4HdomfDVlaLGef3MVmsPXKX3eLwm3Ygd/JLNgcOj02rOtk8+rasYvT4vEkugDmKyyYl NSezLLVI3y6BK2P2Oo6C1aYVn9fuZ21gvKTTxcjJISFgItHY2MQIYYtJXLi3nq2LkYtDSGAp o8STfx+hnM+MEu2L17HCdFxYdB8qsYxR4tOfuywQTgOTxKfmT2wgVWwChhJdb7vAbBEBJ4mF s/6ygxQxC3xnlPi2+zTYKGGBOImNZ94DdXNwsAioSmyeYA1i8gq4S3y77wmxTE7i5LHJrCBh TgEPiR3tySBTJASes0kcO9nKBBKXEJCV2HSAGaLcRaLp4xooW1ji1fEt7BC2jMTlyd0sEHY/ o0RTqzaEPYNR4txbXgjbWuLw8YtghzEL8ElM2jadGWI8r0RHmxBEiYfEj55rTBC2o8SDyy3Q YJjNKHH3xCKWCYwyCxgZVjGKpJYW56anFhvrFSfmFpfmpesl5+duYgRG7Ol/xz/tYPx6wuoQ owAHoxIPr8bMlRFCrIllxZW5hxglOJiVRHgvv1wVIcSbklhZlVqUH19UmpNafIhRmoNFSZx3 z4Ir4UIC6YklqdmpqQWpRTBZJg5OqQZGyQ72h3tF32TUBRyY/1/s/OLnndn3Iq5G63UsyfrL xyitq2eiY5jtFituofimznxDxjTDiUq8nUqFT4QWWTcWB/9tK5ndaB3+L/hS97EQuX33Dxw9 3t53rGhtUmqAzLO+Jfr/V6Yp3cw1qfq9NevqCu3ms1kflyVd5jz+k3nBXC/zjSdemDEpsRRn JBpqMRcVJwIAvlmo3tQCAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrALMWRmVeSWpSXmKPExsVy+t/xy7odH1dFGPz7xGRxa905VotJ9yew WJw/v4HdomfDVlaLGef3MVmsPXKX3eLwm3Ygd/JLNgcOj02rOtk8+rasYvT4vEkugDnKzSYj NTEltUghNS85PyUzL91WKTTETddCSSEvMTfVVilC1zckSEmhLDGnFMgzMkADDs4B7sFK+nYJ bhmz13EUrDat+Lx2P2sD4yWdLkZODgkBE4kLi+6zQdhiEhfurQeyuTiEBJYwSnR9vs0K4TQx Sez80MwKUsUmYCjR9bYLrENEwEli4ay/7CA2s8B3RollN9NAbGGBOImNZ96zdDFycLAIqEps nmANYvIKuEt8u+8JsUtO4uSxyawgYU4BD4kd7ckgYSGgii/PepkmMPIuYGRYxSiSWlqcm55b bKRXnJhbXJqXrpecn7uJERi624793LKDsetd8CFGAQ5GJR5ejZkrI4RYE8uKK3MPMUpwMCuJ 8F5+uSpCiDclsbIqtSg/vqg0J7X4EKMp0EUTmaVEk/OBcZVXEm9oYmhuaWhkbGFhbmSkJM47 9cOVcCGB9MSS1OzU1ILUIpg+Jg5OqQbG4DR1nqiUL5oeN87fiWN/Kf5h/rR/KtN/Rdq/trdZ PJFdR8iejWty3LTwX8fD5JYtfbRk2jamjuL/xyR860U9dQ0OzulbHBL5/sU8Jqv1Sx77BS69 nJV4Puh5uw2n8RnXvozeJS+4rELFZle9bYr71c591aM/5o4+o5vuntIYu8Ylwh9aL+YosRRn JBpqMRcVJwIAK/BnmXMCAAA= X-MTR: 20000000000000000@CPGS X-CMS-MailID: 20170220133914eucas1p1ed7898e67e5d580742875aceaac278e6 X-Msg-Generator: CA X-Sender-IP: 182.198.249.180 X-Local-Sender: =?UTF-8?B?TWFyZWsgU3p5cHJvd3NraRtTUlBPTC1LZXJuZWwgKFRQKRs=?= =?UTF-8?B?7IK87ISx7KCE7J6QG1NlbmlvciBTb2Z0d2FyZSBFbmdpbmVlcg==?= X-Global-Sender: =?UTF-8?B?TWFyZWsgU3p5cHJvd3NraRtTUlBPTC1LZXJuZWwgKFRQKRtT?= =?UTF-8?B?YW1zdW5nIEVsZWN0cm9uaWNzG1NlbmlvciBTb2Z0d2FyZSBFbmdpbmVlcg==?= X-Sender-Code: =?UTF-8?B?QzEwG0VIURtDMTBDRDAyQ0QwMjczOTI=?= CMS-TYPE: 201P X-HopCount: 7 X-CMS-RootMailID: 20170220133914eucas1p1ed7898e67e5d580742875aceaac278e6 X-RootMTR: 20170220133914eucas1p1ed7898e67e5d580742875aceaac278e6 References: <1487597944-2000-1-git-send-email-m.szyprowski@samsung.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP To complete DMA memory configuration for MFC device, allocation of the firmware buffer is needed, because some parameters are dependant on its base address. Till now, this has been handled in the s5p_mfc_alloc_firmware() function. This patch moves that logic to s5p_mfc_configure_dma_memory() to keep DMA memory related operations in a single place. This way s5p_mfc_alloc_firmware() is simplified and does what it name says. The other consequence of this change is moving s5p_mfc_alloc_firmware() call from the s5p_mfc_probe() function to the s5p_mfc_configure_dma_memory(). Signed-off-by: Marek Szyprowski Reviewed-by: Javier Martinez Canillas --- drivers/media/platform/s5p-mfc/s5p_mfc.c | 62 +++++++++++++++++++++------ drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c | 31 -------------- 2 files changed, 49 insertions(+), 44 deletions(-) diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc.c b/drivers/media/platform/s5p-mfc/s5p_mfc.c index bc1aeb25ebeb..4403487a494a 100644 --- a/drivers/media/platform/s5p-mfc/s5p_mfc.c +++ b/drivers/media/platform/s5p-mfc/s5p_mfc.c @@ -1110,6 +1110,11 @@ static struct device *s5p_mfc_alloc_memdev(struct device *dev, static int s5p_mfc_configure_dma_memory(struct s5p_mfc_dev *mfc_dev) { struct device *dev = &mfc_dev->plat_dev->dev; + void *bank2_virt; + dma_addr_t bank2_dma_addr; + unsigned long align_size = 1 << MFC_BASE_ALIGN_ORDER; + struct s5p_mfc_priv_buf *fw_buf = &mfc_dev->fw_buf; + int ret; /* * When IOMMU is available, we cannot use the default configuration, @@ -1122,14 +1127,21 @@ static int s5p_mfc_configure_dma_memory(struct s5p_mfc_dev *mfc_dev) if (exynos_is_iommu_available(dev)) { int ret = exynos_configure_iommu(dev, S5P_MFC_IOMMU_DMA_BASE, S5P_MFC_IOMMU_DMA_SIZE); - if (ret == 0) { - mfc_dev->mem_dev[BANK1_CTX] = - mfc_dev->mem_dev[BANK2_CTX] = dev; - vb2_dma_contig_set_max_seg_size(dev, - DMA_BIT_MASK(32)); + if (ret) + return ret; + + mfc_dev->mem_dev[BANK1_CTX] = mfc_dev->mem_dev[BANK2_CTX] = dev; + ret = s5p_mfc_alloc_firmware(mfc_dev); + if (ret) { + exynos_unconfigure_iommu(dev); + return ret; } - return ret; + mfc_dev->dma_base[BANK1_CTX] = fw_buf->dma; + mfc_dev->dma_base[BANK2_CTX] = fw_buf->dma; + vb2_dma_contig_set_max_seg_size(dev, DMA_BIT_MASK(32)); + + return 0; } /* @@ -1147,6 +1159,35 @@ static int s5p_mfc_configure_dma_memory(struct s5p_mfc_dev *mfc_dev) return -ENODEV; } + /* Allocate memory for firmware and initialize both banks addresses */ + ret = s5p_mfc_alloc_firmware(mfc_dev); + if (ret) { + device_unregister(mfc_dev->mem_dev[BANK2_CTX]); + device_unregister(mfc_dev->mem_dev[BANK1_CTX]); + return ret; + } + + mfc_dev->dma_base[BANK1_CTX] = fw_buf->dma; + + bank2_virt = dma_alloc_coherent(mfc_dev->mem_dev[BANK2_CTX], align_size, + &bank2_dma_addr, GFP_KERNEL); + if (!bank2_virt) { + mfc_err("Allocating bank2 base failed\n"); + s5p_mfc_release_firmware(mfc_dev); + device_unregister(mfc_dev->mem_dev[BANK2_CTX]); + device_unregister(mfc_dev->mem_dev[BANK1_CTX]); + return -ENOMEM; + } + + /* Valid buffers passed to MFC encoder with LAST_FRAME command + * should not have address of bank2 - MFC will treat it as a null frame. + * To avoid such situation we set bank2 address below the pool address. + */ + mfc_dev->dma_base[BANK2_CTX] = bank2_dma_addr - align_size; + + dma_free_coherent(mfc_dev->mem_dev[BANK2_CTX], align_size, bank2_virt, + bank2_dma_addr); + vb2_dma_contig_set_max_seg_size(mfc_dev->mem_dev[BANK1_CTX], DMA_BIT_MASK(32)); vb2_dma_contig_set_max_seg_size(mfc_dev->mem_dev[BANK2_CTX], @@ -1159,6 +1200,8 @@ static void s5p_mfc_unconfigure_dma_memory(struct s5p_mfc_dev *mfc_dev) { struct device *dev = &mfc_dev->plat_dev->dev; + s5p_mfc_release_firmware(mfc_dev); + if (exynos_is_iommu_available(dev)) { exynos_unconfigure_iommu(dev); vb2_dma_contig_clear_max_seg_size(dev); @@ -1235,10 +1278,6 @@ static int s5p_mfc_probe(struct platform_device *pdev) dev->watchdog_timer.data = (unsigned long)dev; dev->watchdog_timer.function = s5p_mfc_watchdog; - ret = s5p_mfc_alloc_firmware(dev); - if (ret) - goto err_res; - ret = v4l2_device_register(&pdev->dev, &dev->v4l2_dev); if (ret) goto err_v4l2_dev_reg; @@ -1313,8 +1352,6 @@ static int s5p_mfc_probe(struct platform_device *pdev) err_dec_alloc: v4l2_device_unregister(&dev->v4l2_dev); err_v4l2_dev_reg: - s5p_mfc_release_firmware(dev); -err_res: s5p_mfc_final_pm(dev); err_dma: s5p_mfc_unconfigure_dma_memory(dev); @@ -1356,7 +1393,6 @@ static int s5p_mfc_remove(struct platform_device *pdev) video_device_release(dev->vfd_enc); video_device_release(dev->vfd_dec); v4l2_device_unregister(&dev->v4l2_dev); - s5p_mfc_release_firmware(dev); s5p_mfc_unconfigure_dma_memory(dev); s5p_mfc_final_pm(dev); diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c b/drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c index 50d698968049..b0cf3970117a 100644 --- a/drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c @@ -26,9 +26,6 @@ /* Allocate memory for firmware */ int s5p_mfc_alloc_firmware(struct s5p_mfc_dev *dev) { - void *bank2_virt; - dma_addr_t bank2_dma_addr; - unsigned int align_size = 1 << MFC_BASE_ALIGN_ORDER; struct s5p_mfc_priv_buf *fw_buf = &dev->fw_buf; fw_buf->size = dev->variant->buf_size->fw; @@ -44,35 +41,7 @@ int s5p_mfc_alloc_firmware(struct s5p_mfc_dev *dev) mfc_err("Allocating bitprocessor buffer failed\n"); return -ENOMEM; } - dev->dma_base[BANK1_CTX] = fw_buf->dma; - - if (HAS_PORTNUM(dev) && IS_TWOPORT(dev)) { - bank2_virt = dma_alloc_coherent(dev->mem_dev[BANK2_CTX], - align_size, &bank2_dma_addr, GFP_KERNEL); - - if (!bank2_virt) { - mfc_err("Allocating bank2 base failed\n"); - dma_free_coherent(dev->mem_dev[BANK1_CTX], fw_buf->size, - fw_buf->virt, fw_buf->dma); - fw_buf->virt = NULL; - return -ENOMEM; - } - - /* Valid buffers passed to MFC encoder with LAST_FRAME command - * should not have address of bank2 - MFC will treat it as a null frame. - * To avoid such situation we set bank2 address below the pool address. - */ - dev->dma_base[BANK2_CTX] = bank2_dma_addr - align_size; - dma_free_coherent(dev->mem_dev[BANK2_CTX], align_size, - bank2_virt, bank2_dma_addr); - - } else { - /* In this case bank2 can point to the same address as bank1. - * Firmware will always occupy the beginning of this area so it is - * impossible having a video frame buffer with zero address. */ - dev->dma_base[BANK2_CTX] = dev->dma_base[BANK1_CTX]; - } return 0; }