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Mon, 20 Mar 2017 10:56:57 +0000 (GMT) Received: from eusmgms1.samsung.com (unknown [182.198.249.179]) by eucas1p2.samsung.com (KnoxPortal) with ESMTP id 20170320105653eucas1p236609e0bbed00d32b41c3eb8b63a159d~tkdk-RC7q3057830578eucas1p2m; Mon, 20 Mar 2017 10:56:53 +0000 (GMT) X-AuditID: cbfec7ef-f79d26d00000420c-cc-58cfb579a32e Received: from eusync4.samsung.com ( [203.254.199.214]) by eusmgms1.samsung.com (EUCPMTA) with SMTP id D4.E7.06687.FD5BFC85; Mon, 20 Mar 2017 10:58:39 +0000 (GMT) Received: from AMDC2765.digital.local ([106.116.147.25]) by eusync4.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0ON4005OP12KYT20@eusync4.samsung.com>; Mon, 20 Mar 2017 10:56:53 +0000 (GMT) From: Marek Szyprowski To: linux-media@vger.kernel.org, linux-samsung-soc@vger.kernel.org Cc: Marek Szyprowski , Sylwester Nawrocki , Andrzej Hajda , Krzysztof Kozlowski , Inki Dae , Seung-Woo Kim Subject: [PATCH v3 13/16] media: s5p-mfc: Remove special configuration of IOMMU domain Date: Mon, 20 Mar 2017 11:56:39 +0100 Message-id: <1490007402-30265-14-git-send-email-m.szyprowski@samsung.com> X-Mailer: git-send-email 1.9.1 In-reply-to: <1490007402-30265-1-git-send-email-m.szyprowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrCIsWRmVeSWpSXmKPExsWy7djP87qVW89HGGxfyG9xa905VotJ9yew WJw/v4HdomfDVlaLGef3MVmsPXKX3eLwm3Ygd/JLNgcOj02rOtk8+rasYvT4vEkugDmKyyYl NSezLLVI3y6BK+P16znMBT90K1Y/uMTYwLhOrYuRg0NCwESi8XpNFyMnkCkmceHeerYuRi4O IYFljBIdlzZCOZ8ZJZ4dm8cEUWUi8W7lFna4qms3rjNCOA1MEndm/WAGqWITMJToetvFBmKL CDhJLJz1F6yDWeA7o8S33adZQRLCAhESJ+5AjGURUJX4ta2VEcTmFfCUuL66E2qdnMTJY5PB 6jmB4i+u/wW7SULgOZtEz9JGZognZCU2HWCGqHeR+LTxDAuELSzx6jjIqSC2jERnx0Gomf2M Ek2t2hD2DEaJc295IWxricPHL4LtYhbgk5i0bTrUeF6JjjYhiBIPiT2T5kKNcZSYuuAuK8Tz cxgl1qxoYJnAKLOAkWEVo0hqaXFuemqxoV5xYm5xaV66XnJ+7iZGYNye/nf8/Q7Gp80hhxgF OBiVeHhvXDoXIcSaWFZcmXuIUYKDWUmE9+Pc8xFCvCmJlVWpRfnxRaU5qcWHGKU5WJTEefcu uBIuJJCeWJKanZpakFoEk2Xi4JRqYMxxjPzzY4fcvpSugxwS2dbiDp9vJbLuEHR49iVK/Q/P ApUjdy5m9xSyLfiys7R695Keut3TWtZ/UmFlrr9YUai9nPXBjoBPIVckWxfeVXudwnliT29R 5YcLr/Peekjk7XxWyB6X2beq/klcs97lJi7t6sPNer49x5ZNvym5TLvuWL1+7DEXRiWW4oxE Qy3mouJEAL+cpSrXAgAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrCLMWRmVeSWpSXmKPExsVy+t/xa7r3t56PMJgzzdji1rpzrBaT7k9g sTh/fgO7Rc+GrawWM87vY7JYe+Quu8XhN+1A7uSXbA4cHptWdbJ59G1ZxejxeZNcAHOUm01G amJKapFCal5yfkpmXrqtUmiIm66FkkJeYm6qrVKErm9IkJJCWWJOKZBnZIAGHJwD3IOV9O0S 3DJev57DXPBDt2L1g0uMDYzr1LoYOTkkBEwk3q3cwg5hi0lcuLeerYuRi0NIYAmjxMZ719gh nCYmiaMre9lAqtgEDCW63naB2SICThILZ/0F62YW+M4osexmGogtLBAhMWXDFLAaFgFViV/b WhlBbF4BT4nrqzuZILbJSZw8NpkVxOYEir+4/hesXkjAQ2Ld54lMExh5FzAyrGIUSS0tzk3P LTbUK07MLS7NS9dLzs/dxAgM4W3Hfm7ewXhpY/AhRgEORiUeXoOr5yKEWBPLiitzDzFKcDAr ifB+nHs+Qog3JbGyKrUoP76oNCe1+BCjKdBRE5mlRJPzgfGVVxJvaGJobmloZGxhYW5kpCTO W/LhSriQQHpiSWp2ampBahFMHxMHp1QDo0nn0VNiq23v+tdaS3b2iDJuYnRevbDw6/b1rpPn vHh5oznsSdQGpg5V2zlnUt6Ie9l4vJ6w4eyxnXEMD06yuEgEX5qotuLYlZDNUkZ/lCpWxnII NW9dZuf+8UJmQs6s/rJcz5+avw8mJE6b6Wi5Xlb/Uc/Tkrepchpfl2o0RNr+VWO4tLRouxJL cUaioRZzUXEiADsaPS93AgAA X-MTR: 20000000000000000@CPGS X-CMS-MailID: 20170320105653eucas1p236609e0bbed00d32b41c3eb8b63a159d X-Msg-Generator: CA X-Sender-IP: 182.198.249.179 X-Local-Sender: =?UTF-8?B?TWFyZWsgU3p5cHJvd3NraRtTUlBPTC1LZXJuZWwgKFRQKRs=?= =?UTF-8?B?7IK87ISx7KCE7J6QG1NlbmlvciBTb2Z0d2FyZSBFbmdpbmVlcg==?= X-Global-Sender: =?UTF-8?B?TWFyZWsgU3p5cHJvd3NraRtTUlBPTC1LZXJuZWwgKFRQKRtT?= =?UTF-8?B?YW1zdW5nIEVsZWN0cm9uaWNzG1NlbmlvciBTb2Z0d2FyZSBFbmdpbmVlcg==?= X-Sender-Code: =?UTF-8?B?QzEwG0VIURtDMTBDRDAyQ0QwMjczOTI=?= CMS-TYPE: 201P X-HopCount: 7 X-CMS-RootMailID: 20170320105653eucas1p236609e0bbed00d32b41c3eb8b63a159d X-RootMTR: 20170320105653eucas1p236609e0bbed00d32b41c3eb8b63a159d References: <1490007402-30265-1-git-send-email-m.szyprowski@samsung.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The main reason for using special configuration of IOMMU domain was the problem with MFC firmware, which failed to operate properly when placed at 0 DMA address. Instead of adding custom code for configuring each variant of IOMMU domain and architecture specific glue code, simply use what arch code provides and if the DMA base address equals zero, skip first 128 KiB to keep required alignment. This patch also make the driver operational on ARM64 architecture, because it no longer depends on ARM specific DMA-mapping and IOMMU glue code functions. Signed-off-by: Marek Szyprowski Reviewed-by: Javier Martinez Canillas Tested-by: Javier Martinez Canillas Acked-by: Andrzej Hajda Tested-by: Smitha T Murthy --- drivers/media/platform/s5p-mfc/s5p_mfc.c | 30 +++++++-------- drivers/media/platform/s5p-mfc/s5p_mfc_iommu.h | 51 +------------------------- 2 files changed, 14 insertions(+), 67 deletions(-) diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc.c b/drivers/media/platform/s5p-mfc/s5p_mfc.c index ea01d0aa8303..f1528054a713 100644 --- a/drivers/media/platform/s5p-mfc/s5p_mfc.c +++ b/drivers/media/platform/s5p-mfc/s5p_mfc.c @@ -1179,18 +1179,6 @@ static int s5p_mfc_configure_common_memory(struct s5p_mfc_dev *mfc_dev) struct device *dev = &mfc_dev->plat_dev->dev; unsigned long mem_size = SZ_8M; unsigned int bitmap_size; - /* - * When IOMMU is available, we cannot use the default configuration, - * because of MFC firmware requirements: address space limited to - * 256M and non-zero default start address. - * This is still simplified, not optimal configuration, but for now - * IOMMU core doesn't allow to configure device's IOMMUs channel - * separately. - */ - int ret = exynos_configure_iommu(dev, S5P_MFC_IOMMU_DMA_BASE, - S5P_MFC_IOMMU_DMA_SIZE); - if (ret) - return ret; if (mfc_mem_size) mem_size = memparse(mfc_mem_size, NULL); @@ -1198,10 +1186,8 @@ static int s5p_mfc_configure_common_memory(struct s5p_mfc_dev *mfc_dev) bitmap_size = BITS_TO_LONGS(mem_size >> PAGE_SHIFT) * sizeof(long); mfc_dev->mem_bitmap = kzalloc(bitmap_size, GFP_KERNEL); - if (!mfc_dev->mem_bitmap) { - exynos_unconfigure_iommu(dev); + if (!mfc_dev->mem_bitmap) return -ENOMEM; - } mfc_dev->mem_virt = dma_alloc_coherent(dev, mem_size, &mfc_dev->mem_base, GFP_KERNEL); @@ -1209,13 +1195,24 @@ static int s5p_mfc_configure_common_memory(struct s5p_mfc_dev *mfc_dev) kfree(mfc_dev->mem_bitmap); dev_err(dev, "failed to preallocate %ld MiB for the firmware and context buffers\n", (mem_size / SZ_1M)); - exynos_unconfigure_iommu(dev); return -ENOMEM; } mfc_dev->mem_size = mem_size; mfc_dev->dma_base[BANK1_CTX] = mfc_dev->mem_base; mfc_dev->dma_base[BANK2_CTX] = mfc_dev->mem_base; + /* + * MFC hardware cannot handle 0 as a base address, so mark first 128K + * as used (to keep required base alignment) and adjust base address + */ + if (mfc_dev->mem_base == (dma_addr_t)0) { + unsigned int offset = 1 << MFC_BASE_ALIGN_ORDER; + + bitmap_set(mfc_dev->mem_bitmap, 0, offset >> PAGE_SHIFT); + mfc_dev->dma_base[BANK1_CTX] += offset; + mfc_dev->dma_base[BANK2_CTX] += offset; + } + /* Firmware allocation cannot fail in this case */ s5p_mfc_alloc_firmware(mfc_dev); @@ -1232,7 +1229,6 @@ static void s5p_mfc_unconfigure_common_memory(struct s5p_mfc_dev *mfc_dev) { struct device *dev = &mfc_dev->plat_dev->dev; - exynos_unconfigure_iommu(dev); dma_free_coherent(dev, mfc_dev->mem_size, mfc_dev->mem_virt, mfc_dev->mem_base); kfree(mfc_dev->mem_bitmap); diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_iommu.h b/drivers/media/platform/s5p-mfc/s5p_mfc_iommu.h index 6962132ae8fa..76667924ee2a 100644 --- a/drivers/media/platform/s5p-mfc/s5p_mfc_iommu.h +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_iommu.h @@ -11,54 +11,13 @@ #ifndef S5P_MFC_IOMMU_H_ #define S5P_MFC_IOMMU_H_ -#define S5P_MFC_IOMMU_DMA_BASE 0x20000000lu -#define S5P_MFC_IOMMU_DMA_SIZE SZ_256M - -#if defined(CONFIG_EXYNOS_IOMMU) && defined(CONFIG_ARM_DMA_USE_IOMMU) - -#include +#if defined(CONFIG_EXYNOS_IOMMU) static inline bool exynos_is_iommu_available(struct device *dev) { return dev->archdata.iommu != NULL; } -static inline void exynos_unconfigure_iommu(struct device *dev) -{ - struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev); - - arm_iommu_detach_device(dev); - arm_iommu_release_mapping(mapping); -} - -static inline int exynos_configure_iommu(struct device *dev, - unsigned int base, unsigned int size) -{ - struct dma_iommu_mapping *mapping = NULL; - int ret; - - /* Disable the default mapping created by device core */ - if (to_dma_iommu_mapping(dev)) - exynos_unconfigure_iommu(dev); - - mapping = arm_iommu_create_mapping(dev->bus, base, size); - if (IS_ERR(mapping)) { - pr_warn("Failed to create IOMMU mapping for device %s\n", - dev_name(dev)); - return PTR_ERR(mapping); - } - - ret = arm_iommu_attach_device(dev, mapping); - if (ret) { - pr_warn("Failed to attached device %s to IOMMU_mapping\n", - dev_name(dev)); - arm_iommu_release_mapping(mapping); - return ret; - } - - return 0; -} - #else static inline bool exynos_is_iommu_available(struct device *dev) @@ -66,14 +25,6 @@ static inline bool exynos_is_iommu_available(struct device *dev) return false; } -static inline int exynos_configure_iommu(struct device *dev, - unsigned int base, unsigned int size) -{ - return -ENOSYS; -} - -static inline void exynos_unconfigure_iommu(struct device *dev) { } - #endif #endif /* S5P_MFC_IOMMU_H_ */