diff mbox

[5/9] drm/exynos/decon5433: kill BIT_IRQS_ENABLED flag

Message ID 1491377317-8042-6-git-send-email-a.hajda@samsung.com (mailing list archive)
State Not Applicable
Headers show

Commit Message

Andrzej Hajda April 5, 2017, 7:28 a.m. UTC
Since DECON uses enable_irq/disable_irq to full control IRQs,
there is no point in having flags to trace it separately.
As a bonus condition for software trigger becomes always true,
so it can be removed.

Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
---
 drivers/gpu/drm/exynos/exynos5433_drm_decon.c | 8 +-------
 1 file changed, 1 insertion(+), 7 deletions(-)

Comments

Inki Dae April 13, 2017, 8:33 a.m. UTC | #1
2017년 04월 05일 16:28에 Andrzej Hajda 이(가) 쓴 글:
> Since DECON uses enable_irq/disable_irq to full control IRQs,
> there is no point in having flags to trace it separately.
> As a bonus condition for software trigger becomes always true,
> so it can be removed.
> 
> Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
> ---
>  drivers/gpu/drm/exynos/exynos5433_drm_decon.c | 8 +-------
>  1 file changed, 1 insertion(+), 7 deletions(-)
> 
> diff --git a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
> index 5bdf1a0..dc2e69a 100644
> --- a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
> +++ b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
> @@ -49,7 +49,6 @@ static const char * const decon_clks_name[] = {
>  
>  enum decon_flag_bits {
>  	BIT_CLKS_ENABLED,
> -	BIT_IRQS_ENABLED,
>  	BIT_WIN_UPDATED,
>  	BIT_SUSPENDED
>  };
> @@ -112,8 +111,6 @@ static int decon_enable_vblank(struct exynos_drm_crtc *crtc)
>  	if (!(ctx->out_type & I80_HW_TRG))
>  		enable_irq(ctx->te_irq);
>  
> -	set_bit(BIT_IRQS_ENABLED, &ctx->flags);
> -
>  	return 0;
>  }
>  
> @@ -121,7 +118,6 @@ static void decon_disable_vblank(struct exynos_drm_crtc *crtc)
>  {
>  	struct decon_context *ctx = crtc->ctx;
>  
> -	clear_bit(BIT_IRQS_ENABLED, &ctx->flags);
>  	if (test_bit(BIT_SUSPENDED, &ctx->flags))
>  		return;
>  
> @@ -536,9 +532,7 @@ static irqreturn_t decon_te_irq_handler(int irq, void *dev_id)
>  	    (ctx->out_type & I80_HW_TRG))
>  		return IRQ_HANDLED;
>  
> -	if (test_and_clear_bit(BIT_WIN_UPDATED, &ctx->flags) ||
> -	    test_bit(BIT_IRQS_ENABLED, &ctx->flags))
> -		decon_set_bits(ctx, DECON_TRIGCON, TRIGCON_SWTRIGCMD, ~0);
> +	decon_set_bits(ctx, DECON_TRIGCON, TRIGCON_SWTRIGCMD, ~0);

This code would incur mulfunction if now decon driver uses sw trigger mode.
The panel device on TM2 and TM2E boards supports ALPM mode which makes Panel device to be keeped on with low power even ARM, crtc and encoder devices are off.
In this case, even if decon device is off te interrupt could happen and writing to decon register could be tried.

Thanks,
Inki Dae

>  
>  	return IRQ_HANDLED;
>  }
> 
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Andrzej Hajda April 13, 2017, 9:10 a.m. UTC | #2
On 13.04.2017 10:33, Inki Dae wrote:
>
> 2017년 04월 05일 16:28에 Andrzej Hajda 이(가) 쓴 글:
>> Since DECON uses enable_irq/disable_irq to full control IRQs,
>> there is no point in having flags to trace it separately.
>> As a bonus condition for software trigger becomes always true,
>> so it can be removed.
>>
>> Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
>> ---
>>  drivers/gpu/drm/exynos/exynos5433_drm_decon.c | 8 +-------
>>  1 file changed, 1 insertion(+), 7 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
>> index 5bdf1a0..dc2e69a 100644
>> --- a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
>> +++ b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
>> @@ -49,7 +49,6 @@ static const char * const decon_clks_name[] = {
>>  
>>  enum decon_flag_bits {
>>  	BIT_CLKS_ENABLED,
>> -	BIT_IRQS_ENABLED,
>>  	BIT_WIN_UPDATED,
>>  	BIT_SUSPENDED
>>  };
>> @@ -112,8 +111,6 @@ static int decon_enable_vblank(struct exynos_drm_crtc *crtc)
>>  	if (!(ctx->out_type & I80_HW_TRG))
>>  		enable_irq(ctx->te_irq);
>>  
>> -	set_bit(BIT_IRQS_ENABLED, &ctx->flags);
>> -
>>  	return 0;
>>  }
>>  
>> @@ -121,7 +118,6 @@ static void decon_disable_vblank(struct exynos_drm_crtc *crtc)
>>  {
>>  	struct decon_context *ctx = crtc->ctx;
>>  
>> -	clear_bit(BIT_IRQS_ENABLED, &ctx->flags);
>>  	if (test_bit(BIT_SUSPENDED, &ctx->flags))
>>  		return;
>>  
>> @@ -536,9 +532,7 @@ static irqreturn_t decon_te_irq_handler(int irq, void *dev_id)
>>  	    (ctx->out_type & I80_HW_TRG))
>>  		return IRQ_HANDLED;
>>  
>> -	if (test_and_clear_bit(BIT_WIN_UPDATED, &ctx->flags) ||
>> -	    test_bit(BIT_IRQS_ENABLED, &ctx->flags))
>> -		decon_set_bits(ctx, DECON_TRIGCON, TRIGCON_SWTRIGCMD, ~0);
>> +	decon_set_bits(ctx, DECON_TRIGCON, TRIGCON_SWTRIGCMD, ~0);
> This code would incur mulfunction if now decon driver uses sw trigger mode.
> The panel device on TM2 and TM2E boards supports ALPM mode which makes Panel device to be keeped on with low power even ARM, crtc and encoder devices are off.
> In this case, even if decon device is off te interrupt could happen and writing to decon register could be tried.

As commit message explains it should not happen because of precise
control of irqs enablement.
More precisely patch 4 prevents it - te irq is disabled by
decon_disable_vblank, and synchronized (ie ensured that there are no
pending irqs) in decon_disable.

Regards
Andrzej

>
> Thanks,
> Inki Dae
>
>>  
>>  	return IRQ_HANDLED;
>>  }
>>
>

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diff mbox

Patch

diff --git a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
index 5bdf1a0..dc2e69a 100644
--- a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
+++ b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
@@ -49,7 +49,6 @@  static const char * const decon_clks_name[] = {
 
 enum decon_flag_bits {
 	BIT_CLKS_ENABLED,
-	BIT_IRQS_ENABLED,
 	BIT_WIN_UPDATED,
 	BIT_SUSPENDED
 };
@@ -112,8 +111,6 @@  static int decon_enable_vblank(struct exynos_drm_crtc *crtc)
 	if (!(ctx->out_type & I80_HW_TRG))
 		enable_irq(ctx->te_irq);
 
-	set_bit(BIT_IRQS_ENABLED, &ctx->flags);
-
 	return 0;
 }
 
@@ -121,7 +118,6 @@  static void decon_disable_vblank(struct exynos_drm_crtc *crtc)
 {
 	struct decon_context *ctx = crtc->ctx;
 
-	clear_bit(BIT_IRQS_ENABLED, &ctx->flags);
 	if (test_bit(BIT_SUSPENDED, &ctx->flags))
 		return;
 
@@ -536,9 +532,7 @@  static irqreturn_t decon_te_irq_handler(int irq, void *dev_id)
 	    (ctx->out_type & I80_HW_TRG))
 		return IRQ_HANDLED;
 
-	if (test_and_clear_bit(BIT_WIN_UPDATED, &ctx->flags) ||
-	    test_bit(BIT_IRQS_ENABLED, &ctx->flags))
-		decon_set_bits(ctx, DECON_TRIGCON, TRIGCON_SWTRIGCMD, ~0);
+	decon_set_bits(ctx, DECON_TRIGCON, TRIGCON_SWTRIGCMD, ~0);
 
 	return IRQ_HANDLED;
 }