diff mbox

[1/2] ARM: dts: exynos: Add dwc3 SUSPHY quirk

Message ID 1505728934-6200-2-git-send-email-andrzej.p@samsung.com (mailing list archive)
State Accepted
Headers show

Commit Message

Andrzej Pietrasiewicz Sept. 18, 2017, 10:02 a.m. UTC
Odroid XU4 board does not enumerate SuperSpeed devices.
This patch makes exynos5 series chips use USB SUSPHY quirk,
which solves the problem.

Signed-off-by: Andrzej Pietrasiewicz <andrzej.p@samsung.com>
---
 arch/arm/boot/dts/exynos54xx.dtsi | 2 ++
 1 file changed, 2 insertions(+)

Comments

Krzysztof Kozlowski Sept. 19, 2017, 5:40 p.m. UTC | #1
On Mon, Sep 18, 2017 at 12:02:13PM +0200, Andrzej Pietrasiewicz wrote:
> Odroid XU4 board does not enumerate SuperSpeed devices.
> This patch makes exynos5 series chips use USB SUSPHY quirk,
> which solves the problem.
> 
> Signed-off-by: Andrzej Pietrasiewicz <andrzej.p@samsung.com>
> ---
>  arch/arm/boot/dts/exynos54xx.dtsi | 2 ++
>  1 file changed, 2 insertions(+)

Makes sense to me... was it tested also on XU3 and XU?

Best regards,
Krzysztof

> 
> diff --git a/arch/arm/boot/dts/exynos54xx.dtsi b/arch/arm/boot/dts/exynos54xx.dtsi
> index 0389e8a..8ca4fef 100644
> --- a/arch/arm/boot/dts/exynos54xx.dtsi
> +++ b/arch/arm/boot/dts/exynos54xx.dtsi
> @@ -134,6 +134,7 @@
>  				interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
>  				phys = <&usbdrd_phy0 0>, <&usbdrd_phy0 1>;
>  				phy-names = "usb2-phy", "usb3-phy";
> +				snps,dis_u3_susphy_quirk;
>  			};
>  		};
>  
> @@ -154,6 +155,7 @@
>  				reg = <0x12400000 0x10000>;
>  				phys = <&usbdrd_phy1 0>, <&usbdrd_phy1 1>;
>  				phy-names = "usb2-phy", "usb3-phy";
> +				snps,dis_u3_susphy_quirk;
>  			};
>  		};
>  
> -- 
> 1.9.1
> 
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Robin Murphy Sept. 19, 2017, 6:10 p.m. UTC | #2
On 19/09/17 18:40, Krzysztof Kozlowski wrote:
> On Mon, Sep 18, 2017 at 12:02:13PM +0200, Andrzej Pietrasiewicz wrote:
>> Odroid XU4 board does not enumerate SuperSpeed devices.
>> This patch makes exynos5 series chips use USB SUSPHY quirk,
>> which solves the problem.
>>
>> Signed-off-by: Andrzej Pietrasiewicz <andrzej.p@samsung.com>
>> ---
>>  arch/arm/boot/dts/exynos54xx.dtsi | 2 ++
>>  1 file changed, 2 insertions(+)
> 
> Makes sense to me... was it tested also on XU3 and XU?

Well, it at least doesn't make USB3 on my XU any more or less broken
than it was before ;) (both ports still report an over-current condition
even with nothing plugged in - I suspect there's probably still some
pinctrl/regulator stuff missing)

Robin.

> 
> Best regards,
> Krzysztof
> 
>>
>> diff --git a/arch/arm/boot/dts/exynos54xx.dtsi b/arch/arm/boot/dts/exynos54xx.dtsi
>> index 0389e8a..8ca4fef 100644
>> --- a/arch/arm/boot/dts/exynos54xx.dtsi
>> +++ b/arch/arm/boot/dts/exynos54xx.dtsi
>> @@ -134,6 +134,7 @@
>>  				interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
>>  				phys = <&usbdrd_phy0 0>, <&usbdrd_phy0 1>;
>>  				phy-names = "usb2-phy", "usb3-phy";
>> +				snps,dis_u3_susphy_quirk;
>>  			};
>>  		};
>>  
>> @@ -154,6 +155,7 @@
>>  				reg = <0x12400000 0x10000>;
>>  				phys = <&usbdrd_phy1 0>, <&usbdrd_phy1 1>;
>>  				phy-names = "usb2-phy", "usb3-phy";
>> +				snps,dis_u3_susphy_quirk;
>>  			};
>>  		};
>>  
>> -- 
>> 1.9.1
>>
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
> 

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Andrzej Pietrasiewicz Sept. 22, 2017, 8:18 a.m. UTC | #3
Hi,

W dniu 19.09.2017 o 20:10, Robin Murphy pisze:
> On 19/09/17 18:40, Krzysztof Kozlowski wrote:
>> On Mon, Sep 18, 2017 at 12:02:13PM +0200, Andrzej Pietrasiewicz wrote:
>>> Odroid XU4 board does not enumerate SuperSpeed devices.
>>> This patch makes exynos5 series chips use USB SUSPHY quirk,
>>> which solves the problem.
>>>
>>> Signed-off-by: Andrzej Pietrasiewicz <andrzej.p@samsung.com>
>>> ---
>>>   arch/arm/boot/dts/exynos54xx.dtsi | 2 ++
>>>   1 file changed, 2 insertions(+)
>>
>> Makes sense to me... was it tested also on XU3 and XU?
> 
> Well, it at least doesn't make USB3 on my XU any more or less broken
> than it was before ;) (both ports still report an over-current condition
> even with nothing plugged in - I suspect there's probably still some
> pinctrl/regulator stuff missing)
> 
> Robin.
> 
Similar with XU3: nothing is any more or less broken with this patch
compared to the situation without the patch.

Andrzej
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Krzysztof Kozlowski Sept. 25, 2017, 6:49 p.m. UTC | #4
On Fri, Sep 22, 2017 at 10:18:54AM +0200, Andrzej Pietrasiewicz wrote:
> Hi,
> 
> W dniu 19.09.2017 o 20:10, Robin Murphy pisze:
> > On 19/09/17 18:40, Krzysztof Kozlowski wrote:
> > > On Mon, Sep 18, 2017 at 12:02:13PM +0200, Andrzej Pietrasiewicz wrote:
> > > > Odroid XU4 board does not enumerate SuperSpeed devices.
> > > > This patch makes exynos5 series chips use USB SUSPHY quirk,
> > > > which solves the problem.
> > > > 
> > > > Signed-off-by: Andrzej Pietrasiewicz <andrzej.p@samsung.com>
> > > > ---
> > > >   arch/arm/boot/dts/exynos54xx.dtsi | 2 ++
> > > >   1 file changed, 2 insertions(+)
> > > 
> > > Makes sense to me... was it tested also on XU3 and XU?
> > 
> > Well, it at least doesn't make USB3 on my XU any more or less broken
> > than it was before ;) (both ports still report an over-current condition
> > even with nothing plugged in - I suspect there's probably still some
> > pinctrl/regulator stuff missing)
> > 
> > Robin.
> > 
> Similar with XU3: nothing is any more or less broken with this patch
> compared to the situation without the patch.

OK, thanks, applied!

Best regards,
Krzysztof

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diff mbox

Patch

diff --git a/arch/arm/boot/dts/exynos54xx.dtsi b/arch/arm/boot/dts/exynos54xx.dtsi
index 0389e8a..8ca4fef 100644
--- a/arch/arm/boot/dts/exynos54xx.dtsi
+++ b/arch/arm/boot/dts/exynos54xx.dtsi
@@ -134,6 +134,7 @@ 
 				interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
 				phys = <&usbdrd_phy0 0>, <&usbdrd_phy0 1>;
 				phy-names = "usb2-phy", "usb3-phy";
+				snps,dis_u3_susphy_quirk;
 			};
 		};
 
@@ -154,6 +155,7 @@ 
 				reg = <0x12400000 0x10000>;
 				phys = <&usbdrd_phy1 0>, <&usbdrd_phy1 1>;
 				phy-names = "usb2-phy", "usb3-phy";
+				snps,dis_u3_susphy_quirk;
 			};
 		};