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Mon, 9 Oct 2017 14:14:38 +0000 (GMT) X-AuditID: b6c32a47-4b1ff70000001114-85-59db844f473a Received: from epmmp1.local.host ( [203.254.227.16]) by epsmgms2p2new.samsung.com (Symantec Messaging Gateway) with SMTP id 8C.6D.06856.E448BD95; Mon, 9 Oct 2017 23:14:38 +0900 (KST) Received: from ubuntu.sisodomain.com ([107.108.83.125]) by mmp1.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0OXK000EJ7JY2K70@mmp1.samsung.com>; Mon, 09 Oct 2017 23:14:38 +0900 (KST) From: Pankaj Dubey To: inux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org Cc: Jingoo Han , Bjorn Helgaas , Krzysztof Kozlowski , Pankaj Dubey , Anvesh Salveru Subject: [PATCH] PCI: exynos: remove redundant code in exynos_pcie_establish_link Date: Mon, 09 Oct 2017 19:44:38 +0530 Message-id: <1507558478-3218-1-git-send-email-pankaj.dubey@samsung.com> X-Mailer: git-send-email 2.7.4 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrHIsWRmVeSWpSXmKPExsWy7bCmma5/y+1Ig1vHxC3O7lrIarGkKcNi x77FTBYrvsxktzh/fgO7xabH11gtZpzfx2SxaOsXdgcOj52z7rJ7LNhU6rFpVSebx+Yl9R59 W1YxenzeJBfAFsVlk5Kak1mWWqRvl8CVcfziPraC5+wV9x9sYGlgPMzWxcjBISFgIrHiMmsX IyeHkMAORonN+5i6GLmA7O+MEg/PT2QGSYDU7Jy1nQ0isZtRYuPrK6wQzk9GiSfb7rCAVLEJ 6Eo8eT8XrENEIF1i18p2sFHMAkcZJe5t/gRWJCwQLLFo3nI2EJtFQFXi16r1YLt5BdwlDj9o g1onJ3HzXCczSLOEwF9WiclH9jBBJFwk5n7pYIewhSVeHd8CZUtLPFu1kRHCrpZ4cvI1C0Tz BKBbDx6HmmovceDKHLArmAX4JDoO/2WHBACvREebEESJh8SnudPYIGxHiWkv1jNBAiZW4uHd 62wTGCUXMDKsYhRLLSjOTU8tNiow1itOzC0uzUvXS87P3cQIjkUt9x2M2875HGIU4GBU4uFt mHYrUog1say4MvcQowQHs5II75Om25FCvCmJlVWpRfnxRaU5qcWHGKU5WJTEeeu2XYsQEkhP LEnNTk0tSC2CyTJxcEo1MK5IXHir6eSsZWaVkpxbdP4ePHzyZZnH34UNmZN55V+UGLo3f3sz sbV9yiHh1w+38rfyXPP49LdsifznHbuut229lNL91M+8bvdCw/trpntckS8QszmlU2Qu7Maz /S/zIk320l729Ud/Lm35fH7d5SeNH5693HAprGgPn7uW1nLn9A+lKo5rQh4rsRRnJBpqMRcV JwIAF6vpjcECAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrFJMWRmVeSWpSXmKPExsVy+t9jAV2/ltuRBkv+ylmc3bWQ1WJJU4bF jn2LmSxWfJnJbnH+/AZ2i02Pr7FazDi/j8li0dYv7A4cHjtn3WX3WLCp1GPTqk42j81L6j36 tqxi9Pi8SS6ALYrLJiU1J7MstUjfLoEr4/jFfWwFz9kr7j/YwNLAeJiti5GTQ0LARGLnrO1A NheHkMBORomZb7YyQjg/GSXmLdjMAlLFJqAr8eT9XOYuRg4OEYF0ifMbrEHCzAJHGSV+bZMG sYUFgiUWzVsONpRFQFXi16r1rCA2r4C7xOEHbcwQy+Qkbp7rZJ7AyLWAkWEVo2RqQXFuem6x UYFRXmq5XnFibnFpXrpecn7uJkZgiGw7rNW/g/HxkvhDjAIcjEo8vA3TbkUKsSaWFVfmHmKU 4GBWEuF90nQ7Uog3JbGyKrUoP76oNCe1+BCjNAeLkjgvf/6xSCGB9MSS1OzU1ILUIpgsEwen VAOj635GqxznQ/t2fmd5z/Hz+P6OAzU9Rz/u45q5e+WpWdEsNlfleo/mNIVqhlyJZO7+xbLE 26eg6sHRUpb7htfPOxf8/nzu4yOfqh/X7fJ8K+1NLnxXWPvh6h6OzWVrfvoeuHE/Ybp7iOam Hw2XDpf2nHkmqBLkkau77r/kqoScy2mHFPafY43zUmIpzkg01GIuKk4EANznGeANAgAA X-CMS-MailID: 20171009141438epcas2p4ead7e2f2d1af7e0950f2c026e3a9943b X-Msg-Generator: CA X-Sender-IP: 182.195.42.143 X-Local-Sender: =?UTF-8?B?7YyQ7Lm07KaIG1NTSVItRkRTIFNXG+yCvOyEseyghOyekBsu?= =?UTF-8?B?L1NlbmlvciBDaGllZiBFbmdpbmVlcg==?= X-Global-Sender: =?UTF-8?B?UEFOS0FKIEtVTUFSIERVQkVZG1NTSVItRkRTIFNXG1NhbXN1?= =?UTF-8?B?bmcgRWxlY3Ryb25pY3MbLi9TZW5pb3IgQ2hpZWYgRW5naW5lZXI=?= X-Sender-Code: =?UTF-8?B?QzEwG1NXQUhRG0MxMElEMDdJRDAxMDk5Nw==?= CMS-TYPE: 102P X-CMS-RootMailID: 20171009141438epcas2p4ead7e2f2d1af7e0950f2c026e3a9943b X-RootMTR: 20171009141438epcas2p4ead7e2f2d1af7e0950f2c026e3a9943b References: Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Anvesh Salveru In exynos_pcie_establish_link if driver is not using generic phy, we are resetting PHY twice, which is redundant, so this patch removes repeated lines of code for PHY reset. Signed-off-by: Anvesh Salveru Acked-by: Jingoo Han --- drivers/pci/dwc/pci-exynos.c | 7 ------- 1 file changed, 7 deletions(-) diff --git a/drivers/pci/dwc/pci-exynos.c b/drivers/pci/dwc/pci-exynos.c index 5596fde..85d2f4b 100644 --- a/drivers/pci/dwc/pci-exynos.c +++ b/drivers/pci/dwc/pci-exynos.c @@ -423,13 +423,6 @@ static int exynos_pcie_establish_link(struct exynos_pcie *ep) exynos_pcie_deassert_phy_reset(ep); exynos_pcie_power_on_phy(ep); exynos_pcie_init_phy(ep); - - /* pulse for common reset */ - exynos_pcie_writel(ep->mem_res->block_base, 1, - PCIE_PHY_COMMON_RESET); - udelay(500); - exynos_pcie_writel(ep->mem_res->block_base, 0, - PCIE_PHY_COMMON_RESET); } /* pulse for common reset */