From patchwork Wed Jun 8 18:31:10 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Matthew Leach X-Patchwork-Id: 9165483 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 0C362604DB for ; Wed, 8 Jun 2016 18:33:23 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 02DD02804C for ; Wed, 8 Jun 2016 18:33:23 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id EBEFB2824F; Wed, 8 Jun 2016 18:33:22 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.9 required=2.0 tests=BAYES_00,FSL_HELO_HOME, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D5EFF2804C for ; Wed, 8 Jun 2016 18:33:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1423024AbcFHSc5 (ORCPT ); Wed, 8 Jun 2016 14:32:57 -0400 Received: from mx0.mattleach.net ([176.58.118.143]:50674 "EHLO mx0.mattleach.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1422857AbcFHSc4 (ORCPT ); Wed, 8 Jun 2016 14:32:56 -0400 Received: by mx0.mattleach.net (Postfix, from userid 99) id D942262254; Wed, 8 Jun 2016 19:32:54 +0100 (BST) Received: from victor.home (host109-154-191-76.range109-154.btcentralplus.com [109.154.191.76]) by mx0.mattleach.net (Postfix) with ESMTPSA id 10D7B62272; Wed, 8 Jun 2016 19:31:26 +0100 (BST) From: Matthew Leach To: Krzysztof Kozlowski , Ben Dooks Cc: linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Marek Szyprowski , Joerg Roedel , Kukjin Kim , iommu@lists.linux-foundation.org Subject: [RFC PATCH 15/15] iommu/exynos: update to use iommu big-endian Date: Wed, 8 Jun 2016 19:31:10 +0100 Message-Id: <20160608183110.13851-16-matthew@mattleach.net> X-Mailer: git-send-email 2.8.3 In-Reply-To: <20160608183110.13851-1-matthew@mattleach.net> References: <20160608183110.13851-1-matthew@mattleach.net> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Ben Dooks Add initial support for big endian by always writing the pte in le32. Note, revisit if hardware capable of doing big endian fetches. Signed-off-by: Ben Dooks Acked-by: Marek Szyprowski --- Cc: Marek Szyprowski Cc: Joerg Roedel Cc: Kukjin Kim Cc: Krzysztof Kozlowski Cc: iommu@lists.linux-foundation.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-samsung-soc@vger.kernel.org Cc: linux-kernel@vger.kernel.org (open list) --- drivers/iommu/exynos-iommu.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/iommu/exynos-iommu.c b/drivers/iommu/exynos-iommu.c index 5ecc86c..dd8b3b3 100644 --- a/drivers/iommu/exynos-iommu.c +++ b/drivers/iommu/exynos-iommu.c @@ -54,6 +54,10 @@ typedef u32 sysmmu_pte_t; #define lv2ent_small(pent) ((*(pent) & 2) == 2) #define lv2ent_large(pent) ((*(pent) & 3) == 1) +#ifdef CONFIG_BIG_ENDIAN +#warning "revisit driver if we can enable big-endian ptes" +#endif + /* * v1.x - v3.x SYSMMU supports 32bit physical and 32bit virtual address spaces * v5.0 introduced support for 36bit physical address space by shifting @@ -716,7 +720,7 @@ static inline void update_pte(sysmmu_pte_t *ent, sysmmu_pte_t val) { dma_sync_single_for_cpu(dma_dev, virt_to_phys(ent), sizeof(*ent), DMA_TO_DEVICE); - *ent = val; + *ent = cpu_to_le32(val); dma_sync_single_for_device(dma_dev, virt_to_phys(ent), sizeof(*ent), DMA_TO_DEVICE); }