@@ -191,3 +191,24 @@ Example:
usbdrdphy0 = &usb3_phy0;
usbdrdphy1 = &usb3_phy1;
};
+
+Samsung Exynos SoC series PCIe PHY controller
+--------------------------------------------------
+Required properties:
+- compatible : Should be set to "samsung,exynos5433-pcie-phy"
+- #phy-cells : must be zero
+- reg : a list of registers usd by phy driver
+
+Optional properites:
+-samsung,pmureg-phandle - handle to syscon used to control PMU registers
+-samsung,fsys-sysreg - handle to syscon used to control the system registers
+
+Example:
+ pcie_phy: pcie-phy@15680000 {
+ #phy-cells = <0>;
+ compatible = "samsung,exynos5433-pcie-phy";
+ reg = <0x15680000 0x1000>;
+ samsung,pmureg-phandle = <&pmu_system_controller>;
+ samsung,fsys-sysreg = <&syscon_fsys>;
+ status = "okay";
+ };
Adds the exynos-pcie-phy binding for Exynos PCIe PHY. This is for using generic PHY framework. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> --- .../devicetree/bindings/phy/samsung-phy.txt | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+)