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Fri, 30 Dec 2016 13:14:27 +0900 (KST) Received: from epcpsbgm1new.samsung.com (u26.gpu120.samsung.co.kr [203.254.230.26]) by epcas1p1.samsung.com (KnoxPortal) with ESMTP id 20161230041427epcas1p135fd1703c0bb0cc47a60f4c619b49973~U7XXX6q0A2243922439epcas1p1T; Fri, 30 Dec 2016 04:14:27 +0000 (GMT) X-AuditID: b6c32a3c-f79646d000004d82-3b-5865df2340bb Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm1new.samsung.com (EPCPMTA) with SMTP id 56.01.28252.32FD5685; Fri, 30 Dec 2016 13:14:27 +0900 (KST) Received: from gangnam.samsung ([10.113.62.47]) by mmp1.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0OIZ00KWDD40ZY30@mmp1.samsung.com>; Fri, 30 Dec 2016 13:14:26 +0900 (KST) From: Andi Shyti To: Chanwoo Choi , Tomasz Figa , Krzysztof Kozlowski , Sylwester Nawrocki , Rob Herring , Mark Rutland , Catalin Marinas , Will Deacon , Kukjin Kim , Javier Martinez Canillas , Linus Walleij Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, stable@vger.kernel.org, Andi Shyti , Andi Shyti Subject: [PATCH v2 4/4] ARM64: dts: TM2: comply to the samsung pinctrl naming convention Date: Fri, 30 Dec 2016 13:14:21 +0900 Message-id: <20161230041421.24448-5-andi.shyti@samsung.com> X-Mailer: git-send-email 2.11.0 In-reply-to: <20161230041421.24448-1-andi.shyti@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAAzWSaUwTURSFeTOdaavWTCrqs2510MSNypRin1pE45JJJFhjjIgxMMITiLQl neL2Q0UFUVEwwSVqsApS04BgIYC4A4kSEnGva12IEHEh4q5EnXbw3zn3nvfdvJurIrX7aZ0q 0+7CTruQxdKDFPUtUwyRES9wYtT11hjU0NpFobIf3QTqrSgEyP+lm0InW29R6P2HSgIVdb4j UUdHjRKV9HsI5Ot8SKF7TSdodLTjCoHO+O8QKO9yqxK1vN9NIff51wB5m/oBevvppmKelq8s rQS8v7yP5C8ce67kfd49NP/s4SWary3fxtcVSaUDdV7Af/aNs6qTsCUDC2nYqcf2VEdapj09 ll2yPHlBcszMKC6Sm4XMrN4u2HAsuzDeGrk4M0v6EKvfIGTlSCWrIIrsjLkWpyPHhfUZDtEV y67mOKOBizIbjEajwRS9ZrYxRoqk4Iyq57uU2Q9Wbqqq/kxuB78X7QVqFWRMsKGtAMh6BLwd qKb3gkEqLdMI4Ju2/aRsdhPwdP1x4v8L/99+hdzwAFhyYZ9SNp8A/NtbqwimaGYK3PH0R4gV zlwhYc1TT8iQTDeAgbOH6GBqGJMEe87UkkGtYCbB0idXQzM0zBzYcunPwLzxsCn/DhXUasYC TwY6qSAIMq+V8HD/CQmkksxY6LtGyvmFMO+rXynrYbDnRt2AHg29f54MMDfCqusNhMzZBeDv tw9ouRENX7wMhEAkMxR+/FpIyXwNLMjXyhEedrT3UrKeD3Pz3wwsqQjA+6c+gGIwxg3CvGAE zhZt6VjkspFBFGxijj3dkOqw+UDoFKdaGsHdW/HNgFEBdojG7cKJWkrYIG62NQOoItlwDRWQ Spo0YfMW7HQkO3OysNgMYqQ9HSR1w1Md0mHbXcmcaSZnMpo4zmyMMrIjNRW5cxK1TLrgwusx zsbO/+8IlVq3HRx4tc6tE79dvG0baq5/HK7Pe2dOiC6tL5t4fvKqauuvnkltPdPaX4X5VhzZ mmvts8QTpTVLN8Y9Gh7RHBeXkHd86zyLjuzKV7sv2teuWz69MyWsYNn4rlVEmxJWrEnxDC7s +5lW3JgAbp7zjGr/OYG7P7siqTj3+6HFmvadjZGmlxGsQswQuKmkUxT+ARjLso+gAwAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrBIsWRmVeSWpSXmKPExsVy+t9jAV3l+6kRBge6NSy2H3nGarH4x3Mm i/fLehgtrn95zmox/8g5Vos3b9cwWfQ/fs1scf78BnaLKX+WM1lsenyN1eLyrjlsFjPO72Oy WHr9IpNF694j7BaH37SzWizY+IjRYtWuP4wWLz+eYHEQ8lgzbw2jx/Uln5g9ds66y+6xaVUn m8eda3vYPDYvqffY0g8U6tuyitHj8ya5AM4oN5uM1MSU1CKF1Lzk/JTMvHRbpdAQN10LJYW8 xNxUW6UIXd+QICWFssScUiDPyAANODgHuAcr6dsluGWsvdvCXnA1vGLt+s/MDYy/XbsYOTkk BEwkrv//wwJhi0lcuLeerYuRi0NIYCmjxMKrSxghnI+MEqc3NDOCVLEJaEo03f4BViUicIBZ 4viHhywgDrPAc0aJQ5smMXcxcnAIC0RJPO6RBGlgEVCVmHdrPxOIzStgLXF4zz8miHXyErva LrKC2JwCNhLz7z0Gs4WAalq3vWWawMi7gJFhFaNEakFyQXFSeq5hXmq5XnFibnFpXrpecn7u JkZwrD2T2sF4cJf7IUYBDkYlHt4fZakRQqyJZcWVuYcYJTiYlUR4ne8BhXhTEiurUovy44tK c1KLDzGaAh02kVlKNDkfmAbySuINTcxNzI0NLMwtLU2MlMR5G2c/CxcSSE8sSc1OTS1ILYLp Y+LglGpgnG37pvjK1Gfpu479Ur67eVHWN//J5o894jpChe7WFs/QkFDXMokxzlrkdyPV4Gh8 lF62f1D7nj1/CkRUC9TcFSbPb2p+xlWVtCi+u3lipkPUf6uI4Oe7L6a9btD7k/7dy+FQ/A+Z tyLm/bzHmZdEM1g8Enp45Pzak38n7maasWGdCd9UoflZSizFGYmGWsxFxYkAbLetu8sCAAA= X-MTR: 20000000000000000@CPGS X-CMS-MailID: 20161230041427epcas1p135fd1703c0bb0cc47a60f4c619b49973 X-Msg-Generator: CA X-Sender-IP: 203.254.230.26 X-Local-Sender: =?UTF-8?B?7JWI65SUG1RpemVuIFBsYXRmb3JtIExhYihTL1fshLzthLAp?= =?UTF-8?B?G+yCvOyEseyghOyekBvssYXsnoQ=?= X-Global-Sender: =?UTF-8?B?QW5kaSBTaHl0aRtUaXplbiBQbGF0Zm9ybSBMYWIuG1NhbXN1?= =?UTF-8?B?bmcgRWxlY3Ryb25pY3MbU2VuaW9yIEVuZ2luZWVy?= X-Sender-Code: =?UTF-8?B?QzEwG1NUQUYbQzEwVjgxMTE=?= CMS-TYPE: 101P DLP-Filter: Pass X-CFilter-Loop: Reflected X-HopCount: 7 X-CMS-RootMailID: 20161230041427epcas1p135fd1703c0bb0cc47a60f4c619b49973 X-RootMTR: 20161230041427epcas1p135fd1703c0bb0cc47a60f4c619b49973 References: <20161230041421.24448-1-andi.shyti@samsung.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Change the PIN() macro definition so that it can use the macros from pinctrl/samsung.h header file. Signed-off-by: Andi Shyti Reviewed-by: Chanwoo Choi --- arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi | 25 +- arch/arm64/boot/dts/exynos/exynos5433-tm2.dts | 254 ++++++++++----------- 2 files changed, 133 insertions(+), 146 deletions(-) diff --git a/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi b/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi index 2af854b11644..d49879bd34bb 100644 --- a/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi @@ -14,25 +14,12 @@ #include -#define PIN_PULL_NONE 0 -#define PIN_PULL_DOWN 1 -#define PIN_PULL_UP 3 - -#define PIN_DRV_LV1 0 -#define PIN_DRV_LV2 2 -#define PIN_DRV_LV3 1 -#define PIN_DRV_LV4 3 - -#define PIN_IN 0 -#define PIN_OUT 1 -#define PIN_FUNC1 2 - -#define PIN(_func, _pin, _pull, _drv) \ - _pin { \ - samsung,pins = #_pin; \ - samsung,pin-function = ; \ - samsung,pin-pud = ; \ - samsung,pin-drv = ; \ +#define PIN(_func, _pin, _pull, _drv) \ + _pin { \ + samsung,pins = #_pin; \ + samsung,pin-function = ; \ + samsung,pin-pud = ; \ + samsung,pin-drv = ; \ } &pinctrl_alive { diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts index f21bdc2ff834..66c4d5959881 100644 --- a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts +++ b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts @@ -742,77 +742,77 @@ pinctrl-0 = <&initial_alive>; initial_alive: initial-state { - PIN(IN, gpa0-0, DOWN, LV1); - PIN(IN, gpa0-1, NONE, LV1); - PIN(IN, gpa0-2, DOWN, LV1); - PIN(IN, gpa0-3, NONE, LV1); - PIN(IN, gpa0-4, NONE, LV1); - PIN(IN, gpa0-5, DOWN, LV1); - PIN(IN, gpa0-6, NONE, LV1); - PIN(IN, gpa0-7, NONE, LV1); - - PIN(IN, gpa1-0, UP, LV1); - PIN(IN, gpa1-1, NONE, LV1); - PIN(IN, gpa1-2, NONE, LV1); - PIN(IN, gpa1-3, DOWN, LV1); - PIN(IN, gpa1-4, DOWN, LV1); - PIN(IN, gpa1-5, NONE, LV1); - PIN(IN, gpa1-6, NONE, LV1); - PIN(IN, gpa1-7, NONE, LV1); - - PIN(IN, gpa2-0, NONE, LV1); - PIN(IN, gpa2-1, NONE, LV1); - PIN(IN, gpa2-2, NONE, LV1); - PIN(IN, gpa2-3, DOWN, LV1); - PIN(IN, gpa2-4, NONE, LV1); - PIN(IN, gpa2-5, DOWN, LV1); - PIN(IN, gpa2-6, DOWN, LV1); - PIN(IN, gpa2-7, NONE, LV1); - - PIN(IN, gpa3-0, DOWN, LV1); - PIN(IN, gpa3-1, DOWN, LV1); - PIN(IN, gpa3-2, NONE, LV1); - PIN(IN, gpa3-3, DOWN, LV1); - PIN(IN, gpa3-4, NONE, LV1); - PIN(IN, gpa3-5, DOWN, LV1); - PIN(IN, gpa3-6, DOWN, LV1); - PIN(IN, gpa3-7, DOWN, LV1); - - PIN(IN, gpf1-0, NONE, LV1); - PIN(IN, gpf1-1, NONE, LV1); - PIN(IN, gpf1-2, DOWN, LV1); - PIN(IN, gpf1-4, UP, LV1); - PIN(OUT, gpf1-5, NONE, LV1); - PIN(IN, gpf1-6, DOWN, LV1); - PIN(IN, gpf1-7, DOWN, LV1); - - PIN(IN, gpf2-0, DOWN, LV1); - PIN(IN, gpf2-1, DOWN, LV1); - PIN(IN, gpf2-2, DOWN, LV1); - PIN(IN, gpf2-3, DOWN, LV1); - - PIN(IN, gpf3-0, DOWN, LV1); - PIN(IN, gpf3-1, DOWN, LV1); - PIN(IN, gpf3-2, NONE, LV1); - PIN(IN, gpf3-3, DOWN, LV1); - - PIN(IN, gpf4-0, DOWN, LV1); - PIN(IN, gpf4-1, DOWN, LV1); - PIN(IN, gpf4-2, DOWN, LV1); - PIN(IN, gpf4-3, DOWN, LV1); - PIN(IN, gpf4-4, DOWN, LV1); - PIN(IN, gpf4-5, DOWN, LV1); - PIN(IN, gpf4-6, DOWN, LV1); - PIN(IN, gpf4-7, DOWN, LV1); - - PIN(IN, gpf5-0, DOWN, LV1); - PIN(IN, gpf5-1, DOWN, LV1); - PIN(IN, gpf5-2, DOWN, LV1); - PIN(IN, gpf5-3, DOWN, LV1); - PIN(OUT, gpf5-4, NONE, LV1); - PIN(IN, gpf5-5, DOWN, LV1); - PIN(IN, gpf5-6, DOWN, LV1); - PIN(IN, gpf5-7, DOWN, LV1); + PIN(INPUT, gpa0-0, DOWN, FAST_SR1); + PIN(INPUT, gpa0-1, NONE, FAST_SR1); + PIN(INPUT, gpa0-2, DOWN, FAST_SR1); + PIN(INPUT, gpa0-3, NONE, FAST_SR1); + PIN(INPUT, gpa0-4, NONE, FAST_SR1); + PIN(INPUT, gpa0-5, DOWN, FAST_SR1); + PIN(INPUT, gpa0-6, NONE, FAST_SR1); + PIN(INPUT, gpa0-7, NONE, FAST_SR1); + + PIN(INPUT, gpa1-0, UP, FAST_SR1); + PIN(INPUT, gpa1-1, NONE, FAST_SR1); + PIN(INPUT, gpa1-2, NONE, FAST_SR1); + PIN(INPUT, gpa1-3, DOWN, FAST_SR1); + PIN(INPUT, gpa1-4, DOWN, FAST_SR1); + PIN(INPUT, gpa1-5, NONE, FAST_SR1); + PIN(INPUT, gpa1-6, NONE, FAST_SR1); + PIN(INPUT, gpa1-7, NONE, FAST_SR1); + + PIN(INPUT, gpa2-0, NONE, FAST_SR1); + PIN(INPUT, gpa2-1, NONE, FAST_SR1); + PIN(INPUT, gpa2-2, NONE, FAST_SR1); + PIN(INPUT, gpa2-3, DOWN, FAST_SR1); + PIN(INPUT, gpa2-4, NONE, FAST_SR1); + PIN(INPUT, gpa2-5, DOWN, FAST_SR1); + PIN(INPUT, gpa2-6, DOWN, FAST_SR1); + PIN(INPUT, gpa2-7, NONE, FAST_SR1); + + PIN(INPUT, gpa3-0, DOWN, FAST_SR1); + PIN(INPUT, gpa3-1, DOWN, FAST_SR1); + PIN(INPUT, gpa3-2, NONE, FAST_SR1); + PIN(INPUT, gpa3-3, DOWN, FAST_SR1); + PIN(INPUT, gpa3-4, NONE, FAST_SR1); + PIN(INPUT, gpa3-5, DOWN, FAST_SR1); + PIN(INPUT, gpa3-6, DOWN, FAST_SR1); + PIN(INPUT, gpa3-7, DOWN, FAST_SR1); + + PIN(INPUT, gpf1-0, NONE, FAST_SR1); + PIN(INPUT, gpf1-1, NONE, FAST_SR1); + PIN(INPUT, gpf1-2, DOWN, FAST_SR1); + PIN(INPUT, gpf1-4, UP, FAST_SR1); + PIN(OUTPUT, gpf1-5, NONE, FAST_SR1); + PIN(INPUT, gpf1-6, DOWN, FAST_SR1); + PIN(INPUT, gpf1-7, DOWN, FAST_SR1); + + PIN(INPUT, gpf2-0, DOWN, FAST_SR1); + PIN(INPUT, gpf2-1, DOWN, FAST_SR1); + PIN(INPUT, gpf2-2, DOWN, FAST_SR1); + PIN(INPUT, gpf2-3, DOWN, FAST_SR1); + + PIN(INPUT, gpf3-0, DOWN, FAST_SR1); + PIN(INPUT, gpf3-1, DOWN, FAST_SR1); + PIN(INPUT, gpf3-2, NONE, FAST_SR1); + PIN(INPUT, gpf3-3, DOWN, FAST_SR1); + + PIN(INPUT, gpf4-0, DOWN, FAST_SR1); + PIN(INPUT, gpf4-1, DOWN, FAST_SR1); + PIN(INPUT, gpf4-2, DOWN, FAST_SR1); + PIN(INPUT, gpf4-3, DOWN, FAST_SR1); + PIN(INPUT, gpf4-4, DOWN, FAST_SR1); + PIN(INPUT, gpf4-5, DOWN, FAST_SR1); + PIN(INPUT, gpf4-6, DOWN, FAST_SR1); + PIN(INPUT, gpf4-7, DOWN, FAST_SR1); + + PIN(INPUT, gpf5-0, DOWN, FAST_SR1); + PIN(INPUT, gpf5-1, DOWN, FAST_SR1); + PIN(INPUT, gpf5-2, DOWN, FAST_SR1); + PIN(INPUT, gpf5-3, DOWN, FAST_SR1); + PIN(OUTPUT, gpf5-4, NONE, FAST_SR1); + PIN(INPUT, gpf5-5, DOWN, FAST_SR1); + PIN(INPUT, gpf5-6, DOWN, FAST_SR1); + PIN(INPUT, gpf5-7, DOWN, FAST_SR1); }; te_irq: te_irq { @@ -826,8 +826,8 @@ pinctrl-0 = <&initial_cpif>; initial_cpif: initial-state { - PIN(IN, gpv6-0, DOWN, LV1); - PIN(IN, gpv6-1, DOWN, LV1); + PIN(INPUT, gpv6-0, DOWN, FAST_SR1); + PIN(INPUT, gpv6-1, DOWN, FAST_SR1); }; }; @@ -836,9 +836,9 @@ pinctrl-0 = <&initial_ese>; initial_ese: initial-state { - PIN(IN, gpj2-0, DOWN, LV1); - PIN(IN, gpj2-1, DOWN, LV1); - PIN(IN, gpj2-2, DOWN, LV1); + PIN(INPUT, gpj2-0, DOWN, FAST_SR1); + PIN(INPUT, gpj2-1, DOWN, FAST_SR1); + PIN(INPUT, gpj2-2, DOWN, FAST_SR1); }; }; @@ -847,11 +847,11 @@ pinctrl-0 = <&initial_fsys>; initial_fsys: initial-state { - PIN(IN, gpr3-0, NONE, LV1); - PIN(IN, gpr3-1, DOWN, LV1); - PIN(IN, gpr3-2, DOWN, LV1); - PIN(IN, gpr3-3, DOWN, LV1); - PIN(IN, gpr3-7, NONE, LV1); + PIN(INPUT, gpr3-0, NONE, FAST_SR1); + PIN(INPUT, gpr3-1, DOWN, FAST_SR1); + PIN(INPUT, gpr3-2, DOWN, FAST_SR1); + PIN(INPUT, gpr3-3, DOWN, FAST_SR1); + PIN(INPUT, gpr3-7, NONE, FAST_SR1); }; }; @@ -860,14 +860,14 @@ pinctrl-0 = <&initial_imem>; initial_imem: initial-state { - PIN(IN, gpf0-0, UP, LV1); - PIN(IN, gpf0-1, UP, LV1); - PIN(IN, gpf0-2, DOWN, LV1); - PIN(IN, gpf0-3, UP, LV1); - PIN(IN, gpf0-4, DOWN, LV1); - PIN(IN, gpf0-5, NONE, LV1); - PIN(IN, gpf0-6, DOWN, LV1); - PIN(IN, gpf0-7, UP, LV1); + PIN(INPUT, gpf0-0, UP, FAST_SR1); + PIN(INPUT, gpf0-1, UP, FAST_SR1); + PIN(INPUT, gpf0-2, DOWN, FAST_SR1); + PIN(INPUT, gpf0-3, UP, FAST_SR1); + PIN(INPUT, gpf0-4, DOWN, FAST_SR1); + PIN(INPUT, gpf0-5, NONE, FAST_SR1); + PIN(INPUT, gpf0-6, DOWN, FAST_SR1); + PIN(INPUT, gpf0-7, UP, FAST_SR1); }; }; @@ -876,7 +876,7 @@ pinctrl-0 = <&initial_nfc>; initial_nfc: initial-state { - PIN(IN, gpj0-2, DOWN, LV1); + PIN(INPUT, gpj0-2, DOWN, FAST_SR1); }; }; @@ -885,54 +885,54 @@ pinctrl-0 = <&initial_peric>; initial_peric: initial-state { - PIN(IN, gpv7-0, DOWN, LV1); - PIN(IN, gpv7-1, DOWN, LV1); - PIN(IN, gpv7-2, NONE, LV1); - PIN(IN, gpv7-3, DOWN, LV1); - PIN(IN, gpv7-4, DOWN, LV1); - PIN(IN, gpv7-5, DOWN, LV1); + PIN(INPUT, gpv7-0, DOWN, FAST_SR1); + PIN(INPUT, gpv7-1, DOWN, FAST_SR1); + PIN(INPUT, gpv7-2, NONE, FAST_SR1); + PIN(INPUT, gpv7-3, DOWN, FAST_SR1); + PIN(INPUT, gpv7-4, DOWN, FAST_SR1); + PIN(INPUT, gpv7-5, DOWN, FAST_SR1); - PIN(IN, gpb0-4, DOWN, LV1); + PIN(INPUT, gpb0-4, DOWN, FAST_SR1); - PIN(IN, gpc0-2, DOWN, LV1); - PIN(IN, gpc0-5, DOWN, LV1); - PIN(IN, gpc0-7, DOWN, LV1); + PIN(INPUT, gpc0-2, DOWN, FAST_SR1); + PIN(INPUT, gpc0-5, DOWN, FAST_SR1); + PIN(INPUT, gpc0-7, DOWN, FAST_SR1); - PIN(IN, gpc1-1, DOWN, LV1); + PIN(INPUT, gpc1-1, DOWN, FAST_SR1); - PIN(IN, gpc3-4, NONE, LV1); - PIN(IN, gpc3-5, NONE, LV1); - PIN(IN, gpc3-6, NONE, LV1); - PIN(IN, gpc3-7, NONE, LV1); + PIN(INPUT, gpc3-4, NONE, FAST_SR1); + PIN(INPUT, gpc3-5, NONE, FAST_SR1); + PIN(INPUT, gpc3-6, NONE, FAST_SR1); + PIN(INPUT, gpc3-7, NONE, FAST_SR1); - PIN(OUT, gpg0-0, NONE, LV1); - PIN(FUNC1, gpg0-1, DOWN, LV1); + PIN(OUTPUT, gpg0-0, NONE, FAST_SR1); + PIN(2, gpg0-1, DOWN, FAST_SR1); - PIN(IN, gpd2-5, DOWN, LV1); + PIN(INPUT, gpd2-5, DOWN, FAST_SR1); - PIN(IN, gpd4-0, NONE, LV1); - PIN(IN, gpd4-1, DOWN, LV1); - PIN(IN, gpd4-2, DOWN, LV1); - PIN(IN, gpd4-3, DOWN, LV1); - PIN(IN, gpd4-4, DOWN, LV1); + PIN(INPUT, gpd4-0, NONE, FAST_SR1); + PIN(INPUT, gpd4-1, DOWN, FAST_SR1); + PIN(INPUT, gpd4-2, DOWN, FAST_SR1); + PIN(INPUT, gpd4-3, DOWN, FAST_SR1); + PIN(INPUT, gpd4-4, DOWN, FAST_SR1); - PIN(IN, gpd6-3, DOWN, LV1); + PIN(INPUT, gpd6-3, DOWN, FAST_SR1); - PIN(IN, gpd8-1, UP, LV1); + PIN(INPUT, gpd8-1, UP, FAST_SR1); - PIN(IN, gpg1-0, DOWN, LV1); - PIN(IN, gpg1-1, DOWN, LV1); - PIN(IN, gpg1-2, DOWN, LV1); - PIN(IN, gpg1-3, DOWN, LV1); - PIN(IN, gpg1-4, DOWN, LV1); + PIN(INPUT, gpg1-0, DOWN, FAST_SR1); + PIN(INPUT, gpg1-1, DOWN, FAST_SR1); + PIN(INPUT, gpg1-2, DOWN, FAST_SR1); + PIN(INPUT, gpg1-3, DOWN, FAST_SR1); + PIN(INPUT, gpg1-4, DOWN, FAST_SR1); - PIN(IN, gpg2-0, DOWN, LV1); - PIN(IN, gpg2-1, DOWN, LV1); + PIN(INPUT, gpg2-0, DOWN, FAST_SR1); + PIN(INPUT, gpg2-1, DOWN, FAST_SR1); - PIN(IN, gpg3-0, DOWN, LV1); - PIN(IN, gpg3-1, DOWN, LV1); - PIN(IN, gpg3-5, DOWN, LV1); - PIN(IN, gpg3-7, DOWN, LV1); + PIN(INPUT, gpg3-0, DOWN, FAST_SR1); + PIN(INPUT, gpg3-1, DOWN, FAST_SR1); + PIN(INPUT, gpg3-5, DOWN, FAST_SR1); + PIN(INPUT, gpg3-7, DOWN, FAST_SR1); }; }; @@ -941,7 +941,7 @@ pinctrl-0 = <&initial_touch>; initial_touch: initial-state { - PIN(IN, gpj1-2, DOWN, LV1); + PIN(INPUT, gpj1-2, DOWN, FAST_SR1); }; };