From patchwork Wed Jan 4 12:34:31 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jaehoon Chung X-Patchwork-Id: 9496621 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 2376B60413 for ; Wed, 4 Jan 2017 12:38:18 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1453B27F46 for ; Wed, 4 Jan 2017 12:38:18 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 0923127F85; Wed, 4 Jan 2017 12:38:18 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A118327F46 for ; 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Wed, 4 Jan 2017 21:34:36 +0900 (KST) Received: from epcpsbgm1new.samsung.com (u26.gpu120.samsung.co.kr [203.254.230.26]) by epcas1p1.samsung.com (KnoxPortal) with ESMTP id 20170104123436epcas1p1d3d840e4ade396a60ce690b09d486990~WkaeOmyyA0688506885epcas1p1C; Wed, 4 Jan 2017 12:34:36 +0000 (GMT) X-AuditID: b6c32a36-f790e6d000003178-8e-586cebdc3339 Received: from epmmp2 ( [203.254.227.17]) by epcpsbgm1new.samsung.com (EPCPMTA) with SMTP id A9.F8.28252.BDBEC685; Wed, 4 Jan 2017 21:34:36 +0900 (KST) Received: from localhost.localdomain ([10.113.62.216]) by mmp2.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0OJ900IEZ9LNGDB0@mmp2.samsung.com>; Wed, 04 Jan 2017 21:34:35 +0900 (KST) From: Jaehoon Chung To: linux-pci@vger.kernel.org Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, bhelgaas@google.com, robh+dt@kernel.org, mark.rutland@arm.com, kgene@kernel.org, krzk@kernel.org, kishon@ti.com, jingoohan1@gmail.com, vivek.gautam@codeaurora.org, pankaj.dubey@samsung.com, alim.akhtar@samsung.com, cpgs@samsung.com, Jaehoon Chung Subject: [PATCH V2 1/5] Documetation: samsung-phy: add the exynos-pcie-phy binding Date: Wed, 04 Jan 2017 21:34:31 +0900 Message-id: <20170104123435.30740-2-jh80.chung@samsung.com> X-Mailer: git-send-email 2.10.2 In-reply-to: <20170104123435.30740-1-jh80.chung@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrJKsWRmVeSWpSXmKPExsWy7bCmnu6d1zkRBnNeqls8mLeNzWJJU4bF y0OaFvOPnGO1uPGrjdVixZeZ7Bb9j18zW1x42sNmcf78BnaLy7vmsFmcnXeczWLG+X1MFkuv X2SyWLT1C7tF694j7BYnfu5gdhDwWDNvDaPH5b5eJo+ds+6yeyzYVOqxaVUnm0ffllWMHsdv bGfy+LxJLoAjKtUmIzUxJbVIITUvOT8lMy/dVsk7ON453tTMwFDX0NLCXEkhLzE31VbJxSdA 1y0zB+h+JYWyxJxSoFBAYnGxkr6dTVF+aUmqQkZ+cYmtUrShoZGeoYG5npGRkZ6JcayVkSlQ SUJqxol5lxgL1nJVzD4d0MB4naOLkZNDQsBEovlNExOELSZx4d56ti5GLg4hgR2MEt9nvGaE cNqZJPZ1b2HuYuQA6/hzUBAiPodRYuGj+ywQzg9GicdXZrGDjGIT0JHY/u042FgRAVmJj5f3 gI1lFvjFJHFg3wewhLBAiMS7BxfZQGwWAVWJeQv3sYFs4BWwlnj+swriJHmJheePgJVzCthI /Fu6gQlkjoTAMXaJy1MfMUJcJCux6QAzRL2LxNvuv1DvCEu8Or6FHcKWllj17xZUbzejxL8v G9kgnB5GiVtbV0N1GEvcf3APbBKzAJ/Eu689rBALeCU62oQgSjwk1jzogRrqKLFjWy8TxPf9 jBI/Ls9hncAos4CRYRWjWGpBcW56arFhgZFecWJucWleul5yfu4mRnCy0zLbwbjonM8hRgEO RiUe3hWLsiOEWBPLiitzDzFKcDArifB+e5ETIcSbklhZlVqUH19UmpNafIjRFBhOE5mlRJPz gYk4ryTe0MTM0MTIxNDQ3MjASEmcd3GjdYSQQHpiSWp2ampBahFMHxMHp1QDY5OoECfPsZ1X 2V4tYSzIjdx9dYP1bKWmOdrv/iWIZDmFfjTJ2F+XdTxFKzE1XVnCPT1986FPV/OuxDXt70p5 fipTvdDsXcOhHyH7zp6VqGk4fsyiseCNgUyI1Nnlc1pmWMikhvJcVHsWGO8d6XXzj1dWe9Lz J59FjnSdzV+nvrKo4cJOdr1cJZbijERDLeai4kQATC3rUowDAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrMIsWRmVeSWpSXmKPExsVy+t9jQd07r3MiDM42s1g8mLeNzWJJU4bF y0OaFvOPnGO1uPGrjdVixZeZ7Bb9j18zW1x42sNmcf78BnaLy7vmsFmcnXeczWLG+X1MFkuv X2SyWLT1C7tF694j7BYnfu5gdhDwWDNvDaPH5b5eJo+ds+6yeyzYVOqxaVUnm0ffllWMHsdv bGfy+LxJLoAjys0mIzUxJbVIITUvOT8lMy/dVik0xE3XQkkhLzE31VYpQtc3JEhJoSwxpxTI MzJAAw7OAe7BSvp2CW4ZJ+ZdYixYy1Ux+3RAA+N1ji5GDg4JAROJPwcFuxg5gUwxiQv31rN1 MXJxCAnMYpTYsmshlPODUWLJ5wZ2kCo2AR2J7d+OM4HYIgKyEh8v72EDsZkFfjFJLN1nCmIL C4RIvHtwESzOIqAqMW/hPjaQZbwC1hLPf1ZBLJOXWHj+CNgYTgEbiX9LN4DZQkAlfScnME1g 5F3AyLCKUSK1ILmgOCk91zAvtVyvODG3uDQvXS85P3cTIziCnkntYDy4y/0QowAHoxIPr8D9 nAgh1sSy4srcQ4wSHMxKIrzfXgCFeFMSK6tSi/Lji0pzUosPMZoC3TWRWUo0OR8Y3Xkl8YYm 5ibmxgYW5paWJkZK4ryNs5+FCwmkJ5akZqemFqQWwfQxcXBKNTBenBAo/EThh6m03Gk+PZZW 35/VqtcehS/xOHKp1fhSaYbVl4ijp34v3/P1WrFt0lWBhaoTmU2cGZdMX73qUk38NIWYFb/4 TDv4Um78/Zbkv0BvwZmncamB816GFdYVPHaRn9Kfzvj0s0zudZZ5jJ9eP5RKtPb+nDrz1q/u vNYpk4233H+n6JelxFKckWioxVxUnAgAJzSpurYCAAA= X-MTR: 20000000000000000@CPGS X-CMS-MailID: 20170104123436epcas1p1d3d840e4ade396a60ce690b09d486990 X-Msg-Generator: CA X-Sender-IP: 203.254.230.26 X-Local-Sender: =?UTF-8?B?7KCV7J6s7ZuIG1RpemVuIFBsYXRmb3JtIExhYihTL1fshLw=?= =?UTF-8?B?7YSwKRvsgrzshLHsoITsnpAbUzUo7LGF7J6EKS/ssYXsnoQ=?= X-Global-Sender: =?UTF-8?B?SmFlaG9vbiBDaHVuZxtUaXplbiBQbGF0Zm9ybSBMYWIuG1Nh?= =?UTF-8?B?bXN1bmcgRWxlY3Ryb25pY3MbUzUvU2VuaW9yIEVuZ2luZWVy?= X-Sender-Code: =?UTF-8?B?QzEwG1NUQUYbQzEwVjgxMTE=?= CMS-TYPE: 101P DLP-Filter: Pass X-CFilter-Loop: Reflected X-HopCount: 7 X-CMS-RootMailID: 20170104123436epcas1p1d3d840e4ade396a60ce690b09d486990 X-RootMTR: 20170104123436epcas1p1d3d840e4ade396a60ce690b09d486990 References: <20170104123435.30740-1-jh80.chung@samsung.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Adds the exynos-pcie-phy binding for Exynos PCIe PHY. This is for using generic PHY framework. Signed-off-by: Jaehoon Chung Acked-by: Rob Herring --- Changelog on V2: - Remove the child node. - Add 2nd address to the parent reg prop. Documentation/devicetree/bindings/phy/samsung-phy.txt | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/Documentation/devicetree/bindings/phy/samsung-phy.txt b/Documentation/devicetree/bindings/phy/samsung-phy.txt index 9872ba8..ab80bfe 100644 --- a/Documentation/devicetree/bindings/phy/samsung-phy.txt +++ b/Documentation/devicetree/bindings/phy/samsung-phy.txt @@ -191,3 +191,20 @@ Example: usbdrdphy0 = &usb3_phy0; usbdrdphy1 = &usb3_phy1; }; + +Samsung Exynos SoC series PCIe PHY controller +-------------------------------------------------- +Required properties: +- compatible : Should be set to "samsung,exynos5440-pcie-phy" +- #phy-cells : Must be zero +- reg : a register used by phy driver. + - First is for phy register, second is for block register. +- reg-names : Must be set to "phy" and "block". + +Example: + pcie_phy0: pcie-phy@270000 { + #phy-cells = <0>; + compatible = "samsung,exynos5440-pcie-phy"; + reg = <0x270000 0x1000>, <0x271000 0x40>; + reg-names = "phy", "block"; + };