From patchwork Wed Jan 4 12:34:33 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jaehoon Chung X-Patchwork-Id: 9496595 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 4B8B060413 for ; Wed, 4 Jan 2017 12:36:11 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3ACEA27F8C for ; Wed, 4 Jan 2017 12:36:11 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 2D76F27F89; Wed, 4 Jan 2017 12:36:11 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E141627F89 for ; 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Wed, 4 Jan 2017 21:34:36 +0900 (KST) Received: from epcpsbgm1new.samsung.com (u26.gpu120.samsung.co.kr [203.254.230.26]) by epcas1p1.samsung.com (KnoxPortal) with ESMTP id 20170104123436epcas1p1040f1e074748fabe58af52eb0b833713~Wkaec4nOl0289802898epcas1p1P; Wed, 4 Jan 2017 12:34:36 +0000 (GMT) X-AuditID: b6c32a3c-f79646d000004d82-9d-586cebdc8041 Received: from epmmp2 ( [203.254.227.17]) by epcpsbgm1new.samsung.com (EPCPMTA) with SMTP id CB.F8.28252.CDBEC685; Wed, 4 Jan 2017 21:34:36 +0900 (KST) Received: from localhost.localdomain ([10.113.62.216]) by mmp2.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0OJ900IEZ9LNGDB0@mmp2.samsung.com>; Wed, 04 Jan 2017 21:34:36 +0900 (KST) From: Jaehoon Chung To: linux-pci@vger.kernel.org Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, bhelgaas@google.com, robh+dt@kernel.org, mark.rutland@arm.com, kgene@kernel.org, krzk@kernel.org, kishon@ti.com, jingoohan1@gmail.com, vivek.gautam@codeaurora.org, pankaj.dubey@samsung.com, alim.akhtar@samsung.com, cpgs@samsung.com, Jaehoon Chung Subject: [PATCH V2 3/5] Documetation: binding: modify the exynos5440 pcie binding Date: Wed, 04 Jan 2017 21:34:33 +0900 Message-id: <20170104123435.30740-4-jh80.chung@samsung.com> X-Mailer: git-send-email 2.10.2 In-reply-to: <20170104123435.30740-1-jh80.chung@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAAzVSaUwTYRD126XbhVhdSpUvCErWaKKB2l2LfGoxGIlu1CjGxBCNwRWWltgr 3dZ4/EFFQUTwiOKBFY0gVohYEdAg0UosRqVVjBKPekU8MJ71gB9o263/3rx5M/NmMiSuHJIl kcVmu2Az80aaiItpuzltRvqzQWOe5nYVjV462wh0ZrsBffBMQye7e2Wof3iXDDUGj8pR9ZtB HPnfVhLI52uRo76rtQS65/QS6IivC0P1j+9j6PTloBztvNYtRz1DHXg2xTU5mwDXV7UX464c ey7n6twOzu3aTXBVrS7AefvbMe6He2IuuVrQGQS+ULClCuYCS2GxWZ9FL1mZvyA/Y5aGSWdm o0w61cybhCw6Z2lu+sJiY8g/nbqRNzpCVC4vivSMeTqbxWEXUg0W0Z5Fr2EYVs1oMtUsy6q1 M9fOYTNCknWC4cbAYZn1tWrT09bSmBKwJ74CkCSktHDHh/kVIDYEx0N/4AJRAeJIJdUB4JcL QSAFZRjsrCmVSyotfBiow6VELYBnm5uiwR8AA1eqibCKoNJg+y8vFsYqKgV+6+uM9MWpYQxe 7/oaSSRQK2FrVyMW9hFDTYFnDljDtIKaC/c//YRJ0ybBU77uCI6ldHCkvgUL94GURw7f/L4F pB1SoPs6LulzoOdg2HYYJ8CP3tao6wnQNfIkWrsHwJHgRUIKKgF8cvl8dNpM+OJlINIJp8bA zz8rZdIABSzfpZQkHPTXBKP0fOj3xkvLVwNYO/SO2AeS68AoFxgvWEWTXhAZK1KLvEl0mPXq AovJDSJvN13XAR70LvUAigT0aEV/ojFPKeM3iptNHgBJnFYpfr0PUYpCfvMWwWbJtzmMgugB GaEz7ceTxhVYQk9stucz2lmMltUyTCarYelERcO2uXlKSs/bhQ2CYBVs/+swMjapBLhKNOeQ s+Fvc8IjAz1Wa0r+cf5U56W03tJAEQ1eleCTFevPBXOGt43amVNWvsYl64bJOpX/UK/h7dpO 97eyGra0x/TwoudEwXLf4GHV0UUrjt9+38U7bxQPf11EpniLmPLPcQPfsycvXnW35R2T2EzJ pxoGRk/Sv1qG38lue7GVjhENPDMdt4n8P+0WSlWMAwAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrMIsWRmVeSWpSXmKPExsVy+t9jQd07r3MiDH7uF7J4MG8bm8WSpgyL l4c0LeYfOcdqceNXG6vFii8z2S36H79mtrjwtIfN4vz5DewWl3fNYbM4O+84m8WM8/uYLJZe v8hksWjrF3aL1r1H2C1O/NzB7CDgsWbeGkaPy329TB47Z91l91iwqdRj06pONo++LasYPY7f 2M7k8XmTXABHlJtNRmpiSmqRQmpecn5KZl66rVJoiJuuhZJCXmJuqq1ShK5vSJCSQlliTimQ Z2SABhycA9yDlfTtEtwyDj6bxlrwSKTi9pYWlgbGbsEuRk4OCQETiSv3FjBD2GISF+6tZwOx hQRmMUr07ZeAsH8wSnR88QOx2QR0JLZ/O84EYosIyEp8vLwHrJ5Z4BeTxNJ9piC2sECwxJZ9 K4BqODhYBFQllkwqAAnzClhLTLz9hglilbzEwvNHwGxOARuJf0s3MEGsspboOzmBaQIj7wJG hlWMEqkFyQXFSem5hnmp5XrFibnFpXnpesn5uZsYwRH0TGoH48Fd7ocYBTgYlXh4Be7nRAix JpYVV+YeYpTgYFYS4f32AijEm5JYWZValB9fVJqTWnyI0RToronMUqLJ+cDoziuJNzQxNzE3 NrAwt7Q0MVIS522c/SxcSCA9sSQ1OzW1ILUIpo+Jg1OqgbFtQl4U83fLqrPPL5T8Pfr31sn9 rSafy4tuOC090XOQ+eOGJpXeHY6OvFNm21WpV/K1PbD+s6dH7tx9kXzZC9ff6l/Z/2ORbWkE 7zput/1p1wKf3nwXNfUF28G179R1Fxs18p0z6Wvw/7+1/3TxBb36nHNb5WxYura3BF/Q0Pc+ dez28RUtuppKLMUZiYZazEXFiQAnjvmOtgIAAA== X-MTR: 20000000000000000@CPGS X-CMS-MailID: 20170104123436epcas1p1040f1e074748fabe58af52eb0b833713 X-Msg-Generator: CA X-Sender-IP: 203.254.230.26 X-Local-Sender: =?UTF-8?B?7KCV7J6s7ZuIG1RpemVuIFBsYXRmb3JtIExhYihTL1fshLw=?= =?UTF-8?B?7YSwKRvsgrzshLHsoITsnpAbUzUo7LGF7J6EKS/ssYXsnoQ=?= X-Global-Sender: =?UTF-8?B?SmFlaG9vbiBDaHVuZxtUaXplbiBQbGF0Zm9ybSBMYWIuG1Nh?= =?UTF-8?B?bXN1bmcgRWxlY3Ryb25pY3MbUzUvU2VuaW9yIEVuZ2luZWVy?= X-Sender-Code: =?UTF-8?B?QzEwG1NUQUYbQzEwVjgxMTE=?= CMS-TYPE: 101P DLP-Filter: Pass X-CFilter-Loop: Reflected X-HopCount: 7 X-CMS-RootMailID: 20170104123436epcas1p1040f1e074748fabe58af52eb0b833713 X-RootMTR: 20170104123436epcas1p1040f1e074748fabe58af52eb0b833713 References: <20170104123435.30740-1-jh80.chung@samsung.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP According to using PHY framework, updates the exynos5440-pcie binding. For maintaining backward compatibility, leaves the current dt-binding. (It should be deprecated.) Recommends to use the Phy Framework and "config" property to follow the designware-pcie binding. If you use the old way, can see "mssing *config* reg space" message. Because the getting configuration space address from range is old way. NOTE: When use the "config" property, first name of 'reg-names' must be set to "elbi". Otherwise driver can't maintain the backward capability. Signed-off-by: Jaehoon Chung Acked-by: Rob Herring Reviewed-by: Pankaj Dubey Reviewed-by: Alim Akhtar --- Changelog on V2: - Describes more commit message - Fixes the typos - Adds the new example for using PHY framework - Deprecated the old dt-binding description - Removes 'phy-names' .../bindings/pci/samsung,exynos5440-pcie.txt | 29 ++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/Documentation/devicetree/bindings/pci/samsung,exynos5440-pcie.txt b/Documentation/devicetree/bindings/pci/samsung,exynos5440-pcie.txt index 4f9d23d..1d0af0e 100644 --- a/Documentation/devicetree/bindings/pci/samsung,exynos5440-pcie.txt +++ b/Documentation/devicetree/bindings/pci/samsung,exynos5440-pcie.txt @@ -7,8 +7,19 @@ Required properties: - compatible: "samsung,exynos5440-pcie" - reg: base addresses and lengths of the pcie controller, the phy controller, additional register for the phy controller. + (Registers for the phy controller are DEPRECATED. + Use the PHY framework.) +- reg-names : First name should be set to "elbi". + And use the "config" instead of getting the confgiruation address space + from "ranges". + NOTE: When use the "config" property, reg-names must be set. - interrupts: A list of interrupt outputs for level interrupt, pulse interrupt, special interrupt. +- phys: From PHY binding. Phandle for the Generic PHY. + Refer to Documentation/devicetree/bindings/phy/samsung-phy.txt + +Other common properties refer to + Documentation/devicetree/binding/pci/designware-pcie.txt Example: @@ -54,6 +65,24 @@ SoC specific DT Entry: num-lanes = <4>; }; +With using PHY framework: + pcie_phy0: pcie-phy@270000 { + ... + reg = <0x270000 0x1000>, <0x271000 0x40>; + regn-names = "phy", "block"; + ... + }; + + pcie@290000 { + ... + reg = <0x290000 0x1000>, <0x40000000 0x1000>; + reg-names = "elbi", "config"; + phys = <&pcie_phy0>; + ranges = <0x81000000 0 0 0x60001000 0 0x00010000 + 0x82000000 0 0x60011000 0x60011000 0 0x1ffef000>; + ... + }; + Board specific DT Entry: pcie@290000 {