| Message ID | 20171220192702.32515-2-krzk@kernel.org (mailing list archive) |
|---|---|
| State | Accepted |
| Headers | show |
On 2017년 12월 21일 04:27, Krzysztof Kozlowski wrote: > Fix typo in unit address of MSCL clock controller (the reg entry is > correct). > > Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> > --- > arch/arm64/boot/dts/exynos/exynos5433.dtsi | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi > index 0ba5df825eff..3e8311c60d1b 100644 > --- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi > +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi > @@ -468,7 +468,7 @@ > clocks = <&xxti>, <&cmu_mif CLK_SCLK_BUS_PLL_ATLAS>; > }; > > - cmu_mscl: clock-controller@105d0000 { > + cmu_mscl: clock-controller@150d0000 { > compatible = "samsung,exynos5433-cmu-mscl"; > reg = <0x150d0000 0x1000>; > #clock-cells = <1>; > Looks good to me. Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi index 0ba5df825eff..3e8311c60d1b 100644 --- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi @@ -468,7 +468,7 @@ clocks = <&xxti>, <&cmu_mif CLK_SCLK_BUS_PLL_ATLAS>; }; - cmu_mscl: clock-controller@105d0000 { + cmu_mscl: clock-controller@150d0000 { compatible = "samsung,exynos5433-cmu-mscl"; reg = <0x150d0000 0x1000>; #clock-cells = <1>;
Fix typo in unit address of MSCL clock controller (the reg entry is correct). Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> --- arch/arm64/boot/dts/exynos/exynos5433.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)