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Tue, 13 Feb 2018 13:41:03 +0000 (GMT) Received: from eucas1p2.samsung.com ( [182.198.249.207]) by eusmges3new.samsung.com (EUCPMTA) with SMTP id FF.70.10409.EEAE28A5; Tue, 13 Feb 2018 13:41:02 +0000 (GMT) Received: from eusmgms1.samsung.com (unknown [182.198.249.179]) by eucas1p1.samsung.com (KnoxPortal) with ESMTP id 20180213134101eucas1p1bd4db5d7bb3fb3cfd6c2a9adcd573758~S5lF3Nmx92479924799eucas1p1_; Tue, 13 Feb 2018 13:41:01 +0000 (GMT) X-AuditID: cbfec7f5-f95739c0000028a9-d3-5a82eaee72e2 Received: from eusync1.samsung.com ( [203.254.199.211]) by eusmgms1.samsung.com (EUCPMTA) with SMTP id 1F.3D.04178.DEAE28A5; Tue, 13 Feb 2018 13:41:01 +0000 (GMT) Received: from AMDC2768.DIGITAL.local ([106.120.43.17]) by eusync1.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0P4300KN6CO7E1B0@eusync1.samsung.com>; Tue, 13 Feb 2018 13:41:01 +0000 (GMT) From: Andrzej Hajda To: Sylwester Nawrocki Cc: Andrzej Hajda , Bartlomiej Zolnierkiewicz , Marek Szyprowski , Tomasz Figa , Chanwoo Choi , Michael Turquette , Stephen Boyd , Kukjin Kim , Krzysztof Kozlowski , linux-samsung-soc@vger.kernel.org (moderated list:SAMSUNG SOC CLOCK DRIVERS), linux-clk@vger.kernel.org (open list:COMMON CLK FRAMEWORK) Subject: [PATCH 5/7] clk: samsung: exynos7: fix PLL rates Date: Tue, 13 Feb 2018 14:40:30 +0100 Message-id: <20180213134032.30235-6-a.hajda@samsung.com> X-Mailer: git-send-email 2.16.1 In-reply-to: <20180213134032.30235-1-a.hajda@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrHIsWRmVeSWpSXmKPExsWy7djP87rvXjVFGXx/p2Nxa905VouNM9az Wlz/8pzVov/xa2aL8+c3sFt87LnHajHj/D4mi7VH7rJbXDzlanH4TTurxb9rG1ksVu36w+jA 4/H+Riu7x85Zd9k9Nq3qZPPo27KK0ePzJrkA1igum5TUnMyy1CJ9uwSujF/Xl7AXfGetOPPt NnMDYyNrFyMnh4SAicTjd6vZuhi5OIQEVjBK/Ov+B+V8ZpS4suAXO0zV2fn7oRLLGCWaF7Wy Qjj/GSVurH7LAlLFJqAp8XfzTTYQW0RAX2LJqotgNrNAI4vEijliILawgKXExJafYPUsAqoS x5ceBtvAK2AhsWvaB2aIbfISh980gd3HCVJ/9wjUrUvYJPo+VELYLhJrXs2Buk5Y4tXxLVC2 jERnx0EmkOMkBLoZJU7t62SGcKYwSpx/dZkJospa4vDxi6wQ1/FJTNo2HaiIAyjOK9HRJgRR 4iHR/eQwG4TtKLHk6huoj3sYJZ7PWsw6gVFqASPDKkbx1NLi3PTUYuO81HK94sTc4tK8dL3k /NxNjMBYPv3v+NcdjPv+JB1iFOBgVOLh7ZjdGCXEmlhWXJl7iFGCg1lJhDfhflOUEG9KYmVV alF+fFFpTmrxIUZpDhYlcd44jbooIYH0xJLU7NTUgtQimCwTB6dUA+MJ6VuBtT1Oc6LapwZ8 jbp2a17ynSuCS+ZLXLJxO+19pH7r/OAZnfJmAjf6Hp4+7vn89YUNATfSY7huGu233WV4dIbl EreNd5YpXZyTUbIpwm3FtfOLq+3YzzIUnntgLFoxY8rcQ7sXvPcWuHHPahHvi3WWK8Rum7qG Zza8/sfK/Of0PdeFPtUflFiKMxINtZiLihMByHd8CuECAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprPLMWRmVeSWpSXmKPExsVy+t/xy7pvXzVFGSzuM7W4te4cq8XGGetZ La5/ec5q0f/4NbPF+fMb2C0+9txjtZhxfh+Txdojd9ktLp5ytTj8pp3V4t+1jSwWq3b9YXTg 8Xh/o5XdY+esu+wem1Z1snn0bVnF6PF5k1wAaxSXTUpqTmZZapG+XQJXxq/rS9gLvrNWnPl2 m7mBsZG1i5GTQ0LAROLs/P1sXYxcHEICSxgl1l/qZ4FwGpkkts1exQhSxSagKfF38002EFtE QF9iyaqLYB3MAo0sEtdWbQQrEhawlJjY8pMFxGYRUJU4vvQwO4jNK2AhsWvaB2aIdfISh980 ga3mBKm/ewTI5gDaZiGxpVV0AiPPAkaGVYwiqaXFuem5xYZ6xYm5xaV56XrJ+bmbGIHBtu3Y z807GC9tDD7EKMDBqMTDuwEYhEKsiWXFlbmHGCU4mJVEeBPuA4V4UxIrq1KL8uOLSnNSiw8x SnOwKInznjeojBISSE8sSc1OTS1ILYLJMnFwSjUwTv5WYHE29M4mzYN1jSwrah9EFnb4xpw7 MGPhgSSuqlU/FP03P3jeJRwmlP33lZUMd+eUxoXv9q6TleeJ7lNpNznz9da5KTrOQqq/r/8/ X5z9u+V3iEvWrMKdmnyszx8Yf1a7v05j+8/JE7XunPz+TfCIkr+tz+XfWnb9NQ2iOcwNwVVM /6yrlViKMxINtZiLihMBCegNsDICAAA= X-CMS-MailID: 20180213134101eucas1p1bd4db5d7bb3fb3cfd6c2a9adcd573758 X-Msg-Generator: CA CMS-TYPE: 201P X-CMS-RootMailID: 20180213134101eucas1p1bd4db5d7bb3fb3cfd6c2a9adcd573758 X-RootMTR: 20180213134101eucas1p1bd4db5d7bb3fb3cfd6c2a9adcd573758 References: <20180213134032.30235-1-a.hajda@samsung.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Declared rates did not match rates generated by PLL. As a result driver behaved inconsitently. Signed-off-by: Andrzej Hajda --- drivers/clk/samsung/clk-exynos7.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/samsung/clk-exynos7.c b/drivers/clk/samsung/clk-exynos7.c index 5931a4140c3d..bbfa57b4e017 100644 --- a/drivers/clk/samsung/clk-exynos7.c +++ b/drivers/clk/samsung/clk-exynos7.c @@ -140,7 +140,7 @@ static const struct samsung_div_clock topc_div_clks[] __initconst = { }; static const struct samsung_pll_rate_table pll1460x_24mhz_tbl[] __initconst = { - PLL_36XX_RATE(491520000, 20, 1, 0, 31457), + PLL_36XX_RATE(491519897, 20, 1, 0, 31457), {}, };