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Miller" , linux-crypto@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, Bartlomiej Zolnierkiewicz , Marek Szyprowski Subject: [PATCH v2 3/3] crypto: s5p: add AES support for Exynos5433 Date: Wed, 23 Jan 2019 17:55:33 +0100 Message-Id: <20190123165533.29645-4-k.konieczny@partner.samsung.com> X-Mailer: git-send-email 2.20.0 In-Reply-To: <20190123165533.29645-1-k.konieczny@partner.samsung.com> MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA01Sa0gUYRTtm5l1x8WxcRW8qBhtChWpCUYDhihpza+Qon6YZZsOKj7b8V2B 5eJjFSs136WWko9ydVnNV2ImLZW0mEiG5SPSzHSVTEQJN3dnLf+de+8595wLl8SlHSInMjo+ iVPEy2NlVhKi8/WG3qO8mg09emsJmPZytYip1isJJn/BhSnsNyJGr28TM1OTGxgz2lNtxZTr +zHm2dAXMWPczML9Jay26RPGdg64s5rmPCt2q66EYF8a+jC2UNuM2FWNa7A4RHIigouNTuEU Xn5XJFHFdwwosd01bbaoT5SJ6kGFrEmgfWBifYZQIQkppRsRTN1fFgnFbwT5xctioVhF8Kdx k9iRqAtqLJIn25KPJfg/yXpLmZllRR+Hr8+HMRN2oA9A8WSZmYTTPzFom1gwD+zpk2CYn90W kCRBu0NVl7epTdGBUFq7JBbc9kFpiwozUazpIMjbvCBQ7OBNxTezFb5NyeqoMq8HWiOGgW6D JWkgVCw2WLA9LOi0lp0uYOyuwQScCr0dc2JBrETwoPiRZeALr3QjIpMxTh8CdY+X0A6AxwVK c2SgbWF8yU7IYAtFnaYTTW0KcrOlAtsDHhqHRQJ2BpWx1YJZyF6/je6i/ZW7rqncdU3lf99a hDcjRy6Zj4vkeO94LtWTl8fxyfGRnuEJcRq0/UzvtnS/utDah6uDiCaRzIYir7GhUpE8hU+P G0RA4jIHKmjkVKiUipCnZ3CKhDBFcizHDyJnkpA5Utf3TF+U0pHyJC6G4xI5xc4UI62dMtHl wacqNqfV/3tVfzilV7tFf/7xfnFTeaNuXn2kYmnNkAb3TuM+e3PO+a2sNSj1wTMKYrH9mGrc o0Qb4JPBD9UGndfMSsdCPHtTKYfJlaHU3rmz07FuTbq+t2k3x+r0B7UeZ8J8I+tHxvup0emy FzWuuTHalHmb8kvZWQug08gIPkrufRhX8PK/tcDkjUgDAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrEIsWRmVeSWpSXmKPExsVy+t/xu7rT53jEGFy4JmexccZ6Vos551tY LLpfyVj07fvPaHH+/AZ2i/v3fjJZXN41h81ixvl9TBZrj9xlt/j/q5nZgctjy8qbTB7bDqh6 bFrVyebxb+EUFo+D7/YwefRtWcXo8XmTXAB7lJ5NUX5pSapCRn5xia1StKGFkZ6hpYWekYml nqGxeayVkamSvp1NSmpOZllqkb5dgl7G5P53jAUb5SqeTtrD2sC4RKKLkZNDQsBEYn3PfJYu Ri4OIYGljBJvGs+yQCSkJRpPr2aCsIUl/lzrYoMo+sQo8WrldjaQBJuAucSj7WfAikQElCUm 35vODGIzC3xkkvizihvEFhZwlnj34inQUA4OFgFVidk7DEHCvAIuEtMWvGWHmC8vMW11FxNI CaeAq0TnrzCQsBBQyfMDX1ghygUlTs58wgIxXV6ieets5gmMArOQpGYhSS1gZFrFKJJaWpyb nltsqFecmFtcmpeul5yfu4kRGD/bjv3cvIPx0sbgQ4wCHIxKPLwb8jxihFgTy4orcw8xSnAw K4nwul50ixHiTUmsrEotyo8vKs1JLT7EaAr0wkRmKdHkfGBs55XEG5oamltYGpobmxubWSiJ 8543qIwSEkhPLEnNTk0tSC2C6WPi4JRqYIxS/fzGQbLUpenHu/5G2aDw/fwrNARms619zlrc 6zYtN76ocfrLtb+6p8/QzDpQZfAt1czxvBKv5YmNF9bYVu9fdbDtpavfmuc6i92Xq/fKh22d a1emmJrDfGZnI8s5tjyn7tw/Ry6qnJv1PmO9fJnTn+M2OgKK10oydIr8iyamJLKmWPbeUmIp zkg01GIuKk4EAEESLf+1AgAA X-CMS-MailID: 20190123165551eucas1p1cd99462e3767dbb4feb88b996225ed21 X-Msg-Generator: CA X-RootMTR: 20190123165551eucas1p1cd99462e3767dbb4feb88b996225ed21 X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20190123165551eucas1p1cd99462e3767dbb4feb88b996225ed21 References: <20190123165533.29645-1-k.konieczny@partner.samsung.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add AES crypto HW acceleration for Exynos5433, with the help of SlimSSS IP. Signed-off-by: Kamil Konieczny Reviewed-by: Krzysztof Kozlowski --- drivers/crypto/s5p-sss.c | 50 ++++++++++++++++++++++++++++++++++++---- 1 file changed, 46 insertions(+), 4 deletions(-) diff --git a/drivers/crypto/s5p-sss.c b/drivers/crypto/s5p-sss.c index 0064be0e3941..e2d247f59254 100644 --- a/drivers/crypto/s5p-sss.c +++ b/drivers/crypto/s5p-sss.c @@ -232,6 +232,7 @@ * struct samsung_aes_variant - platform specific SSS driver data * @aes_offset: AES register offset from SSS module's base. * @hash_offset: HASH register offset from SSS module's base. + * @clk_names: names of clocks needed to run SSS IP * * Specifies platform specific configuration of SSS module. * Note: A structure for driver specific platform data is used for future @@ -240,6 +241,7 @@ struct samsung_aes_variant { unsigned int aes_offset; unsigned int hash_offset; + char *clk_names[]; }; struct s5p_aes_reqctx { @@ -296,6 +298,7 @@ struct s5p_aes_ctx { struct s5p_aes_dev { struct device *dev; struct clk *clk; + struct clk *pclk; void __iomem *ioaddr; void __iomem *aes_ioaddr; int irq_fc; @@ -384,11 +387,19 @@ struct s5p_hash_ctx { static const struct samsung_aes_variant s5p_aes_data = { .aes_offset = 0x4000, .hash_offset = 0x6000, + .clk_names = { "secss", }, }; static const struct samsung_aes_variant exynos_aes_data = { .aes_offset = 0x200, .hash_offset = 0x400, + .clk_names = { "secss", }, +}; + +static const struct samsung_aes_variant exynos5433_slim_aes_data = { + .aes_offset = 0x400, + .hash_offset = 0x800, + .clk_names = { "pclk", "aclk", }, }; static const struct of_device_id s5p_sss_dt_match[] = { @@ -400,6 +411,10 @@ static const struct of_device_id s5p_sss_dt_match[] = { .compatible = "samsung,exynos4210-secss", .data = &exynos_aes_data, }, + { + .compatible = "samsung,exynos5433-slim-sss", + .data = &exynos5433_slim_aes_data, + }, { }, }; MODULE_DEVICE_TABLE(of, s5p_sss_dt_match); @@ -2208,18 +2223,39 @@ static int s5p_aes_probe(struct platform_device *pdev) return PTR_ERR(pdata->ioaddr); } - pdata->clk = devm_clk_get(dev, "secss"); + pdata->clk = devm_clk_get(dev, variant->clk_names[0]); if (IS_ERR(pdata->clk)) { - dev_err(dev, "failed to find secss clock source\n"); + dev_err(dev, "failed to find secss clock %s\n", + variant->clk_names[0]); return -ENOENT; } err = clk_prepare_enable(pdata->clk); if (err < 0) { - dev_err(dev, "Enabling SSS clk failed, err %d\n", err); + dev_err(dev, "Enabling clock %s failed, err %d\n", + variant->clk_names[0], err); return err; } + if (variant->clk_names[1]) { + pdata->pclk = devm_clk_get(dev, variant->clk_names[1]); + if (IS_ERR(pdata->pclk)) { + dev_err(dev, "failed to find clock %s\n", + variant->clk_names[1]); + err = -ENOENT; + goto err_clk; + } + + err = clk_prepare_enable(pdata->pclk); + if (err < 0) { + dev_err(dev, "Enabling clock %s failed, err %d\n", + variant->clk_names[0], err); + goto err_clk; + } + } else { + pdata->pclk = NULL; + } + spin_lock_init(&pdata->lock); spin_lock_init(&pdata->hash_lock); @@ -2295,8 +2331,11 @@ static int s5p_aes_probe(struct platform_device *pdev) tasklet_kill(&pdata->tasklet); err_irq: - clk_disable_unprepare(pdata->clk); + if (pdata->pclk) + clk_disable_unprepare(pdata->pclk); +err_clk: + clk_disable_unprepare(pdata->clk); s5p_dev = NULL; return err; @@ -2323,6 +2362,9 @@ static int s5p_aes_remove(struct platform_device *pdev) pdata->use_hash = false; } + if (pdata->pclk) + clk_disable_unprepare(pdata->pclk); + clk_disable_unprepare(pdata->clk); s5p_dev = NULL;