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Wed, 20 Mar 2019 13:07:19 +0000 (GMT) Received: from eucas1p2.samsung.com ( [182.198.249.207]) by eusmges3new.samsung.com (EUCPMTA) with SMTP id FC.92.04806.70B329C5; Wed, 20 Mar 2019 13:07:19 +0000 (GMT) Received: from eusmgms2.samsung.com (unknown [182.198.249.180]) by eucas1p1.samsung.com (KnoxPortal) with ESMTP id 20190320130718eucas1p1e42feb422bda24a2db733d50eb41ea47~NrJ1uNY2f2311623116eucas1p18; Wed, 20 Mar 2019 13:07:18 +0000 (GMT) X-AuditID: cbfec7f5-34dff700000012c6-30-5c923b07af05 Received: from eusync1.samsung.com ( [203.254.199.211]) by eusmgms2.samsung.com (EUCPMTA) with SMTP id 6C.DA.04128.60B329C5; Wed, 20 Mar 2019 13:07:18 +0000 (GMT) Received: from AMDC3748.DIGITAL.local ([106.120.43.17]) by eusync1.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0POO004P71RZN460@eusync1.samsung.com>; Wed, 20 Mar 2019 13:07:18 +0000 (GMT) From: Andrzej Hajda To: Inki Dae Cc: Andrzej Hajda , Bartlomiej Zolnierkiewicz , Marek Szyprowski , dri-devel@lists.freedesktop.org, linux-samsung-soc@vger.kernel.org, Krzysztof Kozlowski Subject: [PATCH v2 RESEND 16/24] drm/exynos: add GSCALER plane capability Date: Wed, 20 Mar 2019 14:06:59 +0100 Message-id: <20190320130707.25161-17-a.hajda@samsung.com> X-Mailer: git-send-email 2.17.1 In-reply-to: <20190320130707.25161-1-a.hajda@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprOIsWRmVeSWpSXmKPExsWy7djP87rs1pNiDNY+YrW4te4cq8XGGetZ La58fc9mMen+BBaL8+c3sFvMOL+PyWLtkbvsDuwem1Z1snnc7z7O5NG3ZRWjx+dNcgEsUVw2 Kak5mWWpRfp2CVwZ8y9fZCpYJVTR1f2YuYFxK38XIyeHhICJxN8F0xhBbCGBFYwSL+ZldjFy AdmfGSWm7Ghmgyla/+wlG0TRMkaJB4eiIIr+M0qsOdHGDJJgE9CU+Lv5JliRiICyxKp97ewg RcwCvxklpi/fxg6SEBbwlGhvm8EEYrMIqEp0btwGtJqDg1fAUuLE1jiIZfISqzccAJvJCRR+ OOc/2BwJgb+sEvP+djBCFLlIPGtezQRhy0hcntzNAmHXS9xf0cIM0dDBKLF1w05miIS1xOHj F1lBbGYBPolJ26YzgyyWEOCV6GgTgijxkPh34TQ7xGc9jBIdX9cxT2CUWMDIsIpRPLW0ODc9 tdg4L7Vcrzgxt7g0L10vOT93EyMwuk7/O/51B+O+P0mHGAU4GJV4eC88nxAjxJpYVlyZe4hR goNZSYQ3QmlSjBBvSmJlVWpRfnxRaU5q8SFGaQ4WJXHeaoYH0UIC6YklqdmpqQWpRTBZJg5O qQZGk/Kg6/zx1SknleT8NGwy9pRu8tyo57+s4ureJ9oLl95fJV/zv8nl4FZFRZsjacwXm7e9 jjy65nFduJd5827Ze0sdHm2ZUCr95N/Znwobdr67vjV6AvcO4wWBt6VzysM9+HJCpx4JL3jJ PfOl5Z39sT899U8oqQRX3l+m+yFlh3BIp/65yMR0JZbijERDLeai4kQAk5WksaoCAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFmpiluLIzCtJLcpLzFFi42I5/e/4ZV0260kxBu1HlCxurTvHarFxxnpW iytf37NZTLo/gcXi/PkN7BYzzu9jslh75C67A7vHplWdbB73u48zefRtWcXo8XmTXABLFJdN SmpOZllqkb5dAlfG/MsXmQpWCVV0dT9mbmDcyt/FyMkhIWAisf7ZS7YuRi4OIYEljBJL1j+B chqZJP5OAnE4OdgENCX+br4JZosIKEus2tfODlLELPCbUeLzjK/MIAlhAU+J9rYZTCA2i4Cq ROfGbYxdjBwcvAKWEie2xkFsk5dYveEAWDknUPjhnP/sILaQgIXE4hN3GScw8ixgZFjFKJJa WpybnltspFecmFtcmpeul5yfu4kRGDLbjv3csoOx613wIUYBDkYlHt6KpxNihFgTy4orcw8x SnAwK4nwRihNihHiTUmsrEotyo8vKs1JLT7EKM3BoiTOe96gMkpIID2xJDU7NbUgtQgmy8TB KdXAeL3GP1Mp3fDLz4iOv8J1oanJ7pzT5FfO2F17rnTX8kt7eoRW+z5k7P5k+DZY49KFZPcf x090soa6i7nfETh/Os9ZsqBAaZn4Dnne1QbKuQsVuh8kTFDlPvHzp7mS1Ie7kRu5ReI71iY+ +XthZXFaYXjocpcfRsvnym37onwt99q0vefqWVO1lViKMxINtZiLihMBzIblIhUCAAA= X-CMS-MailID: 20190320130718eucas1p1e42feb422bda24a2db733d50eb41ea47 CMS-TYPE: 201P X-CMS-RootMailID: 20190320130718eucas1p1e42feb422bda24a2db733d50eb41ea47 References: <20190320130707.25161-1-a.hajda@samsung.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This bit will indicate the plane is provided by GSCALER. Tests shows that GSCALER does not like to convert from/to too small buffers. Since exact constraints are not provided by documentation rough estimate of 64 pixel has been applied. Signed-off-by: Andrzej Hajda --- drivers/gpu/drm/exynos/exynos_drm_drv.h | 1 + drivers/gpu/drm/exynos/exynos_drm_plane.c | 14 +++++++++++++- 2 files changed, 14 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/exynos/exynos_drm_drv.h b/drivers/gpu/drm/exynos/exynos_drm_drv.h index 5d06e796dc80..7bdbac639b2b 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_drv.h +++ b/drivers/gpu/drm/exynos/exynos_drm_drv.h @@ -75,6 +75,7 @@ to_exynos_plane_state(struct drm_plane_state *state) #define EXYNOS_DRM_PLANE_CAP_TILE (1 << 3) #define EXYNOS_DRM_PLANE_CAP_PIX_BLEND (1 << 4) #define EXYNOS_DRM_PLANE_CAP_WIN_BLEND (1 << 5) +#define EXYNOS_DRM_PLANE_CAP_GSCALER (1 << 6) struct exynos_drm_plane; struct exynos_drm_plane_ops { diff --git a/drivers/gpu/drm/exynos/exynos_drm_plane.c b/drivers/gpu/drm/exynos/exynos_drm_plane.c index 5f8f56b69369..89168157e1e2 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_plane.c +++ b/drivers/gpu/drm/exynos/exynos_drm_plane.c @@ -198,6 +198,11 @@ exynos_drm_plane_check_format(struct exynos_drm_plane_state *state) return 0; } +static bool is_in_range(int val, int min, int max) +{ + return (val >= min) && (val < max); +} + static int exynos_drm_plane_check_size(struct exynos_drm_plane_state *state) { @@ -205,7 +210,7 @@ exynos_drm_plane_check_size(struct exynos_drm_plane_state *state) bool width_ok = false, height_ok = false; if (plane->capabilities & EXYNOS_DRM_PLANE_CAP_SCALE) - return 0; + width_ok = height_ok = true; if (state->src.w == state->crtc.w) width_ok = true; @@ -221,6 +226,13 @@ exynos_drm_plane_check_size(struct exynos_drm_plane_state *state) state->v_ratio == (1 << 15)) height_ok = true; + if (plane->capabilities & EXYNOS_DRM_PLANE_CAP_GSCALER) { + width_ok = is_in_range(state->src.w, 64, 4800) && + is_in_range(state->crtc.w, 64, 4800); + height_ok = is_in_range(state->src.h, 64, 3344) && + is_in_range(state->crtc.h, 64, 3344); + } + if (width_ok && height_ok) return 0;