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Mon, 1 Jul 2019 13:11:54 +0000 (GMT) From: Lukasz Luba To: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-clk@vger.kernel.org Cc: mturquette@baylibre.com, sboyd@kernel.org, b.zolnierkie@samsung.com, krzk@kernel.org, kgene@kernel.org, cw00.choi@samsung.com, kyungmin.park@samsung.com, m.szyprowski@samsung.com, s.nawrocki@samsung.com, myungjoo.ham@samsung.com, keescook@chromium.org, tony@atomide.com, jroedel@suse.de, treding@nvidia.com, digetx@gmail.com, gregkh@linuxfoundation.org, willy.mh.wolff.ml@gmail.com, Lukasz Luba Subject: [PATCH v11 7/9] ARM: dts: exynos: add syscon to clock compatible Date: Mon, 1 Jul 2019 15:11:36 +0200 Message-Id: <20190701131138.22666-8-l.luba@partner.samsung.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190701131138.22666-1-l.luba@partner.samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA0VSa0hTYRju29k5O1vNjlPyyyJhIVTQVpTwRdKFkk7+qQj6UYiteTBzW7WT qWU1q5Uzl6WQ4jQNoca01Lm8dfGeUbqlhYpuUi4wzQtmapmtmmfVv+d93uf5nvd9+UhMMogH k3GaM4xWo1BJCRG/6sV3+/p8Ijhqg21Ajipyy3DU83UIR4UtdhyVTLoBulJcRqDsVwU81H5D jTLdnzHkcJQLUMflUQHq061EkxkDOHpbl0+gKWMLQLmO5zz0sMUlQJ2vIlB/qplAzaPXceTp ruCj+neRqP+HH5p5OQh2BNEz01l8eqJXL6BNuk4+XZvnEtBWi4Gg6wtKBbTxyjhBN44/5dE3 bRZAV74+T09ZV+1ffFgUHsOo4s4yWvm2o6LjE44e/JRdmGTMvMvXAT2ZDoQkpDZDW/8Qlg5E pIQyA1hcYSK44iuA7c5UHldMAThX8AVPB+SC5VE1yfEPAPzRXM7753A1OAiviKBksMZy2hsR SOUCaPp00KvBqGoMjvU7gbcRQO2F1xrtmBfzqVDoGnmDe7GY2g478k0Cbr4QWFLesKARUjtg 17RrYTxIGUhYaPmIcaLd8Krd7DMEwJE2mw+vhL9qC3kcZqHOeA9wOAW6Mwt8mq2wua1zYTOM WgvL6uQcvRMWtg4DbmE/2Dvm76WxPzCrKgfjaDFMuybh1GugLeONL2gZfFB6x/c4DfPHG3Hu PNkA6h/piVsgJO9/WBEAFhDEJLDqWIbdpGESZaxCzSZoYmXKk2or+PPzXnvapmvA8/ljTYAi gXSJWOeEURJccZZNVjcBSGLSQHG9eXmURByjSD7HaE9GaxNUDNsEVpB8aZD4/KL3RyRUrOIM E88wpxjt3y6PFAbrgCY6cD5SDz4sCc3xn+1rzWhyZu+rfKxsdog3b3JFC4pUq7uIXdKsWTTc vSu04bbEfWfA/OL0hYjwpVPOud2JtDKgcVnSoU+aNKvsy8gBS9j3sPuRaYaJWdU3V9/FLeF7 KnufpdcCXZcyRSm/dMJQ4vngKf2ZE188N/9kLE4WZZDy2eOKjeswLav4DYwHaPB1AwAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrKIsWRmVeSWpSXmKPExsVy+t/xu7qz2aRiDTbvsbDYOGM9q8X1L89Z LeYfOcdqsfrjY0aL5sXr2Swmn5rLZHGmO9ei//FrZovz5zewW5xtesNucatBxuJjzz1Wi8u7 5rBZfO49wmgx4/w+Jou1R+6yW1w85Wpxu3EFm8XhN+2sFv+ubWSx2H/Fy+L2bz6LbyceMTqI e3z7OonF4/2NVnaP2Q0XWTx2zrrL7rFpVSebx/65a9g9epvfsXkcfLeHyaNvyypGj82nqz0+ b5IL4I7SsynKLy1JVcjILy6xVYo2tDDSM7S00DMysdQzNDaPtTIyVdK3s0lJzcksSy3St0vQ y3h//jprwTnOit7+eSwNjK0cXYwcHBICJhLrtgOZXBxCAksZJU4eucLUxcgJFBeTmLRvOzuE LSzx51oXG0TRJ0aJrdO7WECa2QT0JHasKgSJiwjMYZT42bWNEcRhFjjLLLF7xRuwScICnhJt B88xg9gsAqoSd19dYAWxeQXsJc7OmQ21QV5i9YYDYDWcAg4Sl77eZQOxhYBq1i2+wTiBkW8B I8MqRpHU0uLc9NxiI73ixNzi0rx0veT83E2MwCjcduznlh2MXe+CDzEKcDAq8fBq3JKIFWJN LCuuzD3EKMHBrCTCu3+FZKwQb0piZVVqUX58UWlOavEhRlOgoyYyS4km5wMTRF5JvKGpobmF paG5sbmxmYWSOG+HwMEYIYH0xJLU7NTUgtQimD4mDk6pBkbVImcO9wsRLGadhXzOAudEJ4RF +SSXL9fcPyObJ/qX9J+vXeKri2d8svE3CJF3m6vzuJ1nj1lUkaKhyW7bbxe9nLd67NzZzmU0 cWf9s2mZrnobNtvu5mufu6bg3Kbf2g78n2wLmfquf6zfcDph9m8Z6/Xqy9LqrKfF7t39L7mZ y3aFz+dbe5VYijMSDbWYi4oTAY24bwjYAgAA X-CMS-MailID: 20190701131156eucas1p2b43f31c138c4afdd8a8cd07bb9d04a20 X-Msg-Generator: CA X-RootMTR: 20190701131156eucas1p2b43f31c138c4afdd8a8cd07bb9d04a20 X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20190701131156eucas1p2b43f31c138c4afdd8a8cd07bb9d04a20 References: <20190701131138.22666-1-l.luba@partner.samsung.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP In order to get the clock by phandle and use it with regmap it needs to be compatible with syscon. The DMC driver uses two registers from clock register set and needs the regmap of them. Signed-off-by: Lukasz Luba --- arch/arm/boot/dts/exynos5420.dtsi | 2 +- arch/arm/boot/dts/exynos5800.dtsi | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi index 5fb2326875dc..d153617ff1a3 100644 --- a/arch/arm/boot/dts/exynos5420.dtsi +++ b/arch/arm/boot/dts/exynos5420.dtsi @@ -173,7 +173,7 @@ }; clock: clock-controller@10010000 { - compatible = "samsung,exynos5420-clock"; + compatible = "samsung,exynos5420-clock", "syscon"; reg = <0x10010000 0x30000>; #clock-cells = <1>; }; diff --git a/arch/arm/boot/dts/exynos5800.dtsi b/arch/arm/boot/dts/exynos5800.dtsi index 57d3b319fd65..0a2b3287ed92 100644 --- a/arch/arm/boot/dts/exynos5800.dtsi +++ b/arch/arm/boot/dts/exynos5800.dtsi @@ -17,7 +17,7 @@ }; &clock { - compatible = "samsung,exynos5800-clock"; + compatible = "samsung,exynos5800-clock", "syscon"; }; &cluster_a15_opp_table {