Message ID | 20190920121431.31678-2-m.szyprowski@samsung.com (mailing list archive) |
---|---|
State | Mainlined |
Commit | 59de78f1d6348b4017aa752695742f8ffbd7ab05 |
Headers | show |
Series | [1/2] ARM: dts: exynos: split phandle in dmas property | expand |
On Fri, Sep 20, 2019 at 02:14:31PM +0200, Marek Szyprowski wrote: > From: Maciej Falkowski <m.falkowski@samsung.com> > > Change representation of phandle array as then > dt-schema counts number of its items properly. Thanks, applied. Please split the commit msg according to Coding Style (submitting patches, chapter 2 and 14). Best regards, Krzysztof
diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi index ba66ea906f60..ba1800c6aaf1 100644 --- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi @@ -1452,7 +1452,7 @@ i2s1: i2s@14d60000 { compatible = "samsung,exynos7-i2s"; reg = <0x14d60000 0x100>; - dmas = <&pdma0 31 &pdma0 30>; + dmas = <&pdma0 31>, <&pdma0 30>; dma-names = "tx", "rx"; interrupts = <GIC_SPI 435 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cmu_peric CLK_PCLK_I2S1>, @@ -1811,7 +1811,7 @@ i2s0: i2s@11440000 { compatible = "samsung,exynos7-i2s"; reg = <0x11440000 0x100>; - dmas = <&adma 0 &adma 2>; + dmas = <&adma 0>, <&adma 2>; dma-names = "tx", "rx"; interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>;