| Message ID | 20200402110430.31156-1-hyunki00.koo@samsung.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | [v2] tty: samsung_tty: 32-bit access for TX/RX hold registers | expand |
On Thu, Apr 02, 2020 at 08:04:29PM +0900, Hyunki Koo wrote: > Support 32-bit access for the TX/RX hold registers UTXH and URXH. > > This is required for some newer SoCs. > > Signed-off-by: Hyunki Koo <hyunki00.koo@samsung.com> > --- > drivers/tty/serial/samsung_tty.c | 78 +++++++++++++++++++++++++++++++++------- > 1 file changed, 66 insertions(+), 12 deletions(-) What changed from v1? Always put that under the --- line, as documented to do so. Please make a v3 with that information. thanks, greg k-h
On Thu, Apr 02, 2020 at 08:04:29PM +0900, Hyunki Koo wrote: > Support 32-bit access for the TX/RX hold registers UTXH and URXH. > > This is required for some newer SoCs. > > Signed-off-by: Hyunki Koo <hyunki00.koo@samsung.com> > --- > drivers/tty/serial/samsung_tty.c | 78 +++++++++++++++++++++++++++++++++------- > 1 file changed, 66 insertions(+), 12 deletions(-) > > diff --git a/drivers/tty/serial/samsung_tty.c b/drivers/tty/serial/samsung_tty.c > index 73f951d65b93..826d8c5846a6 100644 > --- a/drivers/tty/serial/samsung_tty.c > +++ b/drivers/tty/serial/samsung_tty.c > @@ -154,12 +154,47 @@ struct s3c24xx_uart_port { > #define portaddrl(port, reg) \ > ((unsigned long *)(unsigned long)((port)->membase + (reg))) > > -#define rd_regb(port, reg) (readb_relaxed(portaddr(port, reg))) > +static unsigned int rd_reg(struct uart_port *port, int reg) > +{ > + switch (port->iotype) { > + case UPIO_MEM: > + return readb_relaxed(portaddr(port, reg)); > + case UPIO_MEM32: > + return readl_relaxed(portaddr(port, reg)); > + default: > + return 0; > + } > + return 0; > +} > + > #define rd_regl(port, reg) (readl_relaxed(portaddr(port, reg))) > > -#define wr_regb(port, reg, val) writeb_relaxed(val, portaddr(port, reg)) > +static void wr_reg(struct uart_port *port, int reg, int val) > +{ > + switch (port->iotype) { > + case UPIO_MEM: > + writeb_relaxed(val, portaddr(port, reg)); > + break; > + case UPIO_MEM32: > + writel_relaxed(val, portaddr(port, reg)); > + break; > + } > +} > + > #define wr_regl(port, reg, val) writel_relaxed(val, portaddr(port, reg)) > > +static void write_buf(struct uart_port *port, int reg, int val) > +{ > + switch (port->iotype) { > + case UPIO_MEM: > + writeb(val, portaddr(port, reg)); > + break; > + case UPIO_MEM32: > + writel(val, portaddr(port, reg)); > + break; > + } > +} > + > /* Byte-order aware bit setting/clearing functions. */ > > static inline void s3c24xx_set_bit(struct uart_port *port, int idx, > @@ -714,7 +749,7 @@ static void s3c24xx_serial_rx_drain_fifo(struct s3c24xx_uart_port *ourport) > fifocnt--; > > uerstat = rd_regl(port, S3C2410_UERSTAT); > - ch = rd_regb(port, S3C2410_URXH); > + ch = rd_reg(port, S3C2410_URXH); > > if (port->flags & UPF_CONS_FLOW) { > int txe = s3c24xx_serial_txempty_nofifo(port); > @@ -826,7 +861,7 @@ static irqreturn_t s3c24xx_serial_tx_chars(int irq, void *id) > } > > if (port->x_char) { > - wr_regb(port, S3C2410_UTXH, port->x_char); > + wr_reg(port, S3C2410_UTXH, port->x_char); > port->icount.tx++; > port->x_char = 0; > goto out; > @@ -852,7 +887,7 @@ static irqreturn_t s3c24xx_serial_tx_chars(int irq, void *id) > if (rd_regl(port, S3C2410_UFSTAT) & ourport->info->tx_fifofull) > break; > > - wr_regb(port, S3C2410_UTXH, xmit->buf[xmit->tail]); > + wr_reg(port, S3C2410_UTXH, xmit->buf[xmit->tail]); > xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); > port->icount.tx++; > count--; > @@ -916,7 +951,7 @@ static unsigned int s3c24xx_serial_tx_empty(struct uart_port *port) > /* no modem control lines */ > static unsigned int s3c24xx_serial_get_mctrl(struct uart_port *port) > { > - unsigned int umstat = rd_regb(port, S3C2410_UMSTAT); > + unsigned int umstat = rd_reg(port, S3C2410_UMSTAT); > > if (umstat & S3C2410_UMSTAT_CTS) > return TIOCM_CAR | TIOCM_DSR | TIOCM_CTS; > @@ -1974,7 +2009,7 @@ static int s3c24xx_serial_probe(struct platform_device *pdev) > struct device_node *np = pdev->dev.of_node; > struct s3c24xx_uart_port *ourport; > int index = probe_index; > - int ret; > + int ret, prop = 0; > > if (np) { > ret = of_alias_get_id(np, "serial"); > @@ -2000,10 +2035,29 @@ static int s3c24xx_serial_probe(struct platform_device *pdev) > dev_get_platdata(&pdev->dev) : > ourport->drv_data->def_cfg; > > - if (np) > + if (np) { > of_property_read_u32(np, > "samsung,uart-fifosize", &ourport->port.fifosize); > > + if (of_property_read_u32(np, "reg-io-width", &prop) == 0) { > + switch (prop) { > + case 1: > + ourport->port.iotype = UPIO_MEM; > + break; > + case 4: > + ourport->port.iotype = UPIO_MEM32; > + break; > + default: > + dev_warn(&pdev->dev, "unsupported reg-io-width (%d)\n", > + prop); > + ret = -EINVAL; > + break; > + } > + } else { > + ourport->port.iotype = UPIO_MEM; > + } > + } I think this still breaks all non-DT platforms (e.g. s3c). Best regards, Krzysztof
On Thu, Apr 02, 2020 at 10:59:29PM +0900, Krzysztof Kozlowski > On Thu, Apr 02, 2020 at 08:04:29PM +0900, Hyunki Koo wrote: > > Support 32-bit access for the TX/RX hold registers UTXH and URXH. > > > > This is required for some newer SoCs. > > > > Signed-off-by: Hyunki Koo <hyunki00.koo@samsung.com> > > --- > > drivers/tty/serial/samsung_tty.c | 78 > > +++++++++++++++++++++++++++++++++------- > > 1 file changed, 66 insertions(+), 12 deletions(-) > > > > diff --git a/drivers/tty/serial/samsung_tty.c > > b/drivers/tty/serial/samsung_tty.c > > index 73f951d65b93..826d8c5846a6 100644 > > --- a/drivers/tty/serial/samsung_tty.c > > +++ b/drivers/tty/serial/samsung_tty.c > > @@ -154,12 +154,47 @@ struct s3c24xx_uart_port { #define > > portaddrl(port, reg) \ > > ((unsigned long *)(unsigned long)((port)->membase + (reg))) > > > > -#define rd_regb(port, reg) (readb_relaxed(portaddr(port, reg))) > > +static unsigned int rd_reg(struct uart_port *port, int reg) { > > + switch (port->iotype) { > > + case UPIO_MEM: > > + return readb_relaxed(portaddr(port, reg)); > > + case UPIO_MEM32: > > + return readl_relaxed(portaddr(port, reg)); > > + default: > > + return 0; > > + } > > + return 0; > > +} > > + > > #define rd_regl(port, reg) (readl_relaxed(portaddr(port, reg))) > > > > -#define wr_regb(port, reg, val) writeb_relaxed(val, portaddr(port, > > reg)) > > +static void wr_reg(struct uart_port *port, int reg, int val) { > > + switch (port->iotype) { > > + case UPIO_MEM: > > + writeb_relaxed(val, portaddr(port, reg)); > > + break; > > + case UPIO_MEM32: > > + writel_relaxed(val, portaddr(port, reg)); > > + break; > > + } > > +} > > + > > #define wr_regl(port, reg, val) writel_relaxed(val, portaddr(port, > > reg)) > > > > +static void write_buf(struct uart_port *port, int reg, int val) { > > + switch (port->iotype) { > > + case UPIO_MEM: > > + writeb(val, portaddr(port, reg)); > > + break; > > + case UPIO_MEM32: > > + writel(val, portaddr(port, reg)); > > + break; > > + } > > +} > > + > > /* Byte-order aware bit setting/clearing functions. */ > > > > static inline void s3c24xx_set_bit(struct uart_port *port, int idx, > > @@ -714,7 +749,7 @@ static void s3c24xx_serial_rx_drain_fifo(struct > s3c24xx_uart_port *ourport) > > fifocnt--; > > > > uerstat = rd_regl(port, S3C2410_UERSTAT); > > - ch = rd_regb(port, S3C2410_URXH); > > + ch = rd_reg(port, S3C2410_URXH); > > > > if (port->flags & UPF_CONS_FLOW) { > > int txe = s3c24xx_serial_txempty_nofifo(port); > > @@ -826,7 +861,7 @@ static irqreturn_t s3c24xx_serial_tx_chars(int > irq, void *id) > > } > > > > if (port->x_char) { > > - wr_regb(port, S3C2410_UTXH, port->x_char); > > + wr_reg(port, S3C2410_UTXH, port->x_char); > > port->icount.tx++; > > port->x_char = 0; > > goto out; > > @@ -852,7 +887,7 @@ static irqreturn_t s3c24xx_serial_tx_chars(int > irq, void *id) > > if (rd_regl(port, S3C2410_UFSTAT) & ourport->info- > >tx_fifofull) > > break; > > > > - wr_regb(port, S3C2410_UTXH, xmit->buf[xmit->tail]); > > + wr_reg(port, S3C2410_UTXH, xmit->buf[xmit->tail]); > > xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); > > port->icount.tx++; > > count--; > > @@ -916,7 +951,7 @@ static unsigned int > s3c24xx_serial_tx_empty(struct > > uart_port *port) > > /* no modem control lines */ > > static unsigned int s3c24xx_serial_get_mctrl(struct uart_port *port) > > { > > - unsigned int umstat = rd_regb(port, S3C2410_UMSTAT); > > + unsigned int umstat = rd_reg(port, S3C2410_UMSTAT); > > > > if (umstat & S3C2410_UMSTAT_CTS) > > return TIOCM_CAR | TIOCM_DSR | TIOCM_CTS; @@ - > 1974,7 +2009,7 @@ > > static int s3c24xx_serial_probe(struct platform_device *pdev) > > struct device_node *np = pdev->dev.of_node; > > struct s3c24xx_uart_port *ourport; > > int index = probe_index; > > - int ret; > > + int ret, prop = 0; > > > > if (np) { > > ret = of_alias_get_id(np, "serial"); @@ -2000,10 > +2035,29 @@ static > > int s3c24xx_serial_probe(struct platform_device *pdev) > > dev_get_platdata(&pdev->dev) : > > ourport->drv_data->def_cfg; > > > > - if (np) > > + if (np) { > > of_property_read_u32(np, > > "samsung,uart-fifosize", &ourport->port.fifosize); > > > > + if (of_property_read_u32(np, "reg-io-width", &prop) == > 0) { > > + switch (prop) { > > + case 1: > > + ourport->port.iotype = UPIO_MEM; > > + break; > > + case 4: > > + ourport->port.iotype = UPIO_MEM32; > > + break; > > + default: > > + dev_warn(&pdev->dev, "unsupported > reg-io-width (%d)\n", > > + prop); > > + ret = -EINVAL; > > + break; > > + } > > + } else { > > + ourport->port.iotype = UPIO_MEM; > > + } > > + } > > I think this still breaks all non-DT platforms (e.g. s3c). > > Best regards, > Krzysztof Thank you for your comment. I hope ourport->port.iotype is initialized by below table for non-DT platforms 1662 static struct s3c24xx_uart_port 1663 s3c24xx_serial_ports[CONFIG_SERIAL_SAMSUNG_UARTS] = { 1664 [0] = { 1665 .port = { 1666 .lock = __PORT_LOCK_UNLOCKED(0), 1667 .iotype = UPIO_MEM, 1668 .uartclk = 0, 1669 .fifosize = 16, 1670 .ops = &s3c24xx_serial_ops, 1671 .flags = UPF_BOOT_AUTOCONF, 1672 .line = 0, 1673 } 1674 }, 1675 [1] = { 1676 .port = { 1677 .lock = __PORT_LOCK_UNLOCKED(1), 1678 .iotype = UPIO_MEM, 1679 .uartclk = 0, 1680 .fifosize = 16, 1681 .ops = &s3c24xx_serial_ops, 1682 .flags = UPF_BOOT_AUTOCONF, 1683 .line = 1, 1684 } 1685 },
On Fri, Apr 03, 2020 at 04:30:38PM +0900, Hyunki Koo wrote: > On Thu, Apr 02, 2020 at 10:59:29PM +0900, Krzysztof Kozlowski > > On Thu, Apr 02, 2020 at 08:04:29PM +0900, Hyunki Koo wrote: > > > Support 32-bit access for the TX/RX hold registers UTXH and URXH. > > > > > > This is required for some newer SoCs. > > > > > > Signed-off-by: Hyunki Koo <hyunki00.koo@samsung.com> > > > --- > > > drivers/tty/serial/samsung_tty.c | 78 > > > +++++++++++++++++++++++++++++++++------- > > > 1 file changed, 66 insertions(+), 12 deletions(-) > > > > > > diff --git a/drivers/tty/serial/samsung_tty.c > > > b/drivers/tty/serial/samsung_tty.c > > > index 73f951d65b93..826d8c5846a6 100644 > > > --- a/drivers/tty/serial/samsung_tty.c > > > +++ b/drivers/tty/serial/samsung_tty.c > > > @@ -154,12 +154,47 @@ struct s3c24xx_uart_port { #define > > > portaddrl(port, reg) \ > > > ((unsigned long *)(unsigned long)((port)->membase + (reg))) > > > > > > -#define rd_regb(port, reg) (readb_relaxed(portaddr(port, reg))) > > > +static unsigned int rd_reg(struct uart_port *port, int reg) { > > > + switch (port->iotype) { > > > + case UPIO_MEM: > > > + return readb_relaxed(portaddr(port, reg)); > > > + case UPIO_MEM32: > > > + return readl_relaxed(portaddr(port, reg)); > > > + default: > > > + return 0; > > > + } > > > + return 0; > > > +} > > > + > > > #define rd_regl(port, reg) (readl_relaxed(portaddr(port, reg))) > > > > > > -#define wr_regb(port, reg, val) writeb_relaxed(val, portaddr(port, > > > reg)) > > > +static void wr_reg(struct uart_port *port, int reg, int val) { > > > + switch (port->iotype) { > > > + case UPIO_MEM: > > > + writeb_relaxed(val, portaddr(port, reg)); > > > + break; > > > + case UPIO_MEM32: > > > + writel_relaxed(val, portaddr(port, reg)); > > > + break; > > > + } > > > +} > > > + > > > #define wr_regl(port, reg, val) writel_relaxed(val, portaddr(port, > > > reg)) > > > > > > +static void write_buf(struct uart_port *port, int reg, int val) { > > > + switch (port->iotype) { > > > + case UPIO_MEM: > > > + writeb(val, portaddr(port, reg)); > > > + break; > > > + case UPIO_MEM32: > > > + writel(val, portaddr(port, reg)); > > > + break; > > > + } > > > +} > > > + > > > /* Byte-order aware bit setting/clearing functions. */ > > > > > > static inline void s3c24xx_set_bit(struct uart_port *port, int idx, > > > @@ -714,7 +749,7 @@ static void s3c24xx_serial_rx_drain_fifo(struct > > s3c24xx_uart_port *ourport) > > > fifocnt--; > > > > > > uerstat = rd_regl(port, S3C2410_UERSTAT); > > > - ch = rd_regb(port, S3C2410_URXH); > > > + ch = rd_reg(port, S3C2410_URXH); > > > > > > if (port->flags & UPF_CONS_FLOW) { > > > int txe = s3c24xx_serial_txempty_nofifo(port); > > > @@ -826,7 +861,7 @@ static irqreturn_t s3c24xx_serial_tx_chars(int > > irq, void *id) > > > } > > > > > > if (port->x_char) { > > > - wr_regb(port, S3C2410_UTXH, port->x_char); > > > + wr_reg(port, S3C2410_UTXH, port->x_char); > > > port->icount.tx++; > > > port->x_char = 0; > > > goto out; > > > @@ -852,7 +887,7 @@ static irqreturn_t s3c24xx_serial_tx_chars(int > > irq, void *id) > > > if (rd_regl(port, S3C2410_UFSTAT) & ourport->info- > > >tx_fifofull) > > > break; > > > > > > - wr_regb(port, S3C2410_UTXH, xmit->buf[xmit->tail]); > > > + wr_reg(port, S3C2410_UTXH, xmit->buf[xmit->tail]); > > > xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); > > > port->icount.tx++; > > > count--; > > > @@ -916,7 +951,7 @@ static unsigned int > > s3c24xx_serial_tx_empty(struct > > > uart_port *port) > > > /* no modem control lines */ > > > static unsigned int s3c24xx_serial_get_mctrl(struct uart_port *port) > > > { > > > - unsigned int umstat = rd_regb(port, S3C2410_UMSTAT); > > > + unsigned int umstat = rd_reg(port, S3C2410_UMSTAT); > > > > > > if (umstat & S3C2410_UMSTAT_CTS) > > > return TIOCM_CAR | TIOCM_DSR | TIOCM_CTS; @@ - > > 1974,7 +2009,7 @@ > > > static int s3c24xx_serial_probe(struct platform_device *pdev) > > > struct device_node *np = pdev->dev.of_node; > > > struct s3c24xx_uart_port *ourport; > > > int index = probe_index; > > > - int ret; > > > + int ret, prop = 0; > > > > > > if (np) { > > > ret = of_alias_get_id(np, "serial"); @@ -2000,10 > > +2035,29 @@ static > > > int s3c24xx_serial_probe(struct platform_device *pdev) > > > dev_get_platdata(&pdev->dev) : > > > ourport->drv_data->def_cfg; > > > > > > - if (np) > > > + if (np) { > > > of_property_read_u32(np, > > > "samsung,uart-fifosize", &ourport->port.fifosize); > > > > > > + if (of_property_read_u32(np, "reg-io-width", &prop) == > > 0) { > > > + switch (prop) { > > > + case 1: > > > + ourport->port.iotype = UPIO_MEM; > > > + break; > > > + case 4: > > > + ourport->port.iotype = UPIO_MEM32; > > > + break; > > > + default: > > > + dev_warn(&pdev->dev, "unsupported > > reg-io-width (%d)\n", > > > + prop); > > > + ret = -EINVAL; > > > + break; > > > + } > > > + } else { > > > + ourport->port.iotype = UPIO_MEM; > > > + } > > > + } > > > > I think this still breaks all non-DT platforms (e.g. s3c). > > > > Best regards, > > Krzysztof > > Thank you for your comment. > I hope ourport->port.iotype is initialized by below table for non-DT platforms Indeed, you're right. In this case, this else() you added is not needed. The default value for non-DT and existing DT platforms will be the same (UPIO_MEM). Best regards, Krzysztof
On Thu, Apr 02, 2020 at 4:51:29PM +0900, Krzysztof Kozlowski > On Fri, Apr 03, 2020 at 04:30:38PM +0900, Hyunki Koo wrote: > > On Thu, Apr 02, 2020 at 10:59:29PM +0900, Krzysztof Kozlowski > > > On Thu, Apr 02, 2020 at 08:04:29PM +0900, Hyunki Koo wrote: > > > > Support 32-bit access for the TX/RX hold registers UTXH and URXH. > > > > > > > > This is required for some newer SoCs. > > > > > > > > Signed-off-by: Hyunki Koo <hyunki00.koo@samsung.com> > > > > --- > > > > drivers/tty/serial/samsung_tty.c | 78 > > > > +++++++++++++++++++++++++++++++++------- > > > > 1 file changed, 66 insertions(+), 12 deletions(-) > > > > > > > > diff --git a/drivers/tty/serial/samsung_tty.c > > > > b/drivers/tty/serial/samsung_tty.c > > > > index 73f951d65b93..826d8c5846a6 100644 > > > > --- a/drivers/tty/serial/samsung_tty.c > > > > +++ b/drivers/tty/serial/samsung_tty.c > > > > @@ -154,12 +154,47 @@ struct s3c24xx_uart_port { #define > > > > portaddrl(port, reg) \ > > > > ((unsigned long *)(unsigned long)((port)->membase + (reg))) > > > > > > > > -#define rd_regb(port, reg) (readb_relaxed(portaddr(port, reg))) > > > > +static unsigned int rd_reg(struct uart_port *port, int reg) { > > > > + switch (port->iotype) { > > > > + case UPIO_MEM: > > > > + return readb_relaxed(portaddr(port, reg)); > > > > + case UPIO_MEM32: > > > > + return readl_relaxed(portaddr(port, reg)); > > > > + default: > > > > + return 0; > > > > + } > > > > + return 0; > > > > +} > > > > + > > > > #define rd_regl(port, reg) (readl_relaxed(portaddr(port, reg))) > > > > > > > > -#define wr_regb(port, reg, val) writeb_relaxed(val, > > > > portaddr(port, > > > > reg)) > > > > +static void wr_reg(struct uart_port *port, int reg, int val) { > > > > + switch (port->iotype) { > > > > + case UPIO_MEM: > > > > + writeb_relaxed(val, portaddr(port, reg)); > > > > + break; > > > > + case UPIO_MEM32: > > > > + writel_relaxed(val, portaddr(port, reg)); > > > > + break; > > > > + } > > > > +} > > > > + > > > > #define wr_regl(port, reg, val) writel_relaxed(val, > > > > portaddr(port, > > > > reg)) > > > > > > > > +static void write_buf(struct uart_port *port, int reg, int val) { > > > > + switch (port->iotype) { > > > > + case UPIO_MEM: > > > > + writeb(val, portaddr(port, reg)); > > > > + break; > > > > + case UPIO_MEM32: > > > > + writel(val, portaddr(port, reg)); > > > > + break; > > > > + } > > > > +} > > > > + > > > > /* Byte-order aware bit setting/clearing functions. */ > > > > > > > > static inline void s3c24xx_set_bit(struct uart_port *port, int > > > > idx, @@ -714,7 +749,7 @@ static void > > > > s3c24xx_serial_rx_drain_fifo(struct > > > s3c24xx_uart_port *ourport) > > > > fifocnt--; > > > > > > > > uerstat = rd_regl(port, S3C2410_UERSTAT); > > > > - ch = rd_regb(port, S3C2410_URXH); > > > > + ch = rd_reg(port, S3C2410_URXH); > > > > > > > > if (port->flags & UPF_CONS_FLOW) { > > > > int txe = s3c24xx_serial_txempty_nofifo(port); > > > > @@ -826,7 +861,7 @@ static irqreturn_t > s3c24xx_serial_tx_chars(int > > > irq, void *id) > > > > } > > > > > > > > if (port->x_char) { > > > > - wr_regb(port, S3C2410_UTXH, port->x_char); > > > > + wr_reg(port, S3C2410_UTXH, port->x_char); > > > > port->icount.tx++; > > > > port->x_char = 0; > > > > goto out; > > > > @@ -852,7 +887,7 @@ static irqreturn_t > s3c24xx_serial_tx_chars(int > > > irq, void *id) > > > > if (rd_regl(port, S3C2410_UFSTAT) & ourport->info- > > > >tx_fifofull) > > > > break; > > > > > > > > - wr_regb(port, S3C2410_UTXH, xmit->buf[xmit->tail]); > > > > + wr_reg(port, S3C2410_UTXH, xmit->buf[xmit->tail]); > > > > xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); > > > > port->icount.tx++; > > > > count--; > > > > @@ -916,7 +951,7 @@ static unsigned int > > > s3c24xx_serial_tx_empty(struct > > > > uart_port *port) > > > > /* no modem control lines */ > > > > static unsigned int s3c24xx_serial_get_mctrl(struct uart_port > > > > *port) { > > > > - unsigned int umstat = rd_regb(port, S3C2410_UMSTAT); > > > > + unsigned int umstat = rd_reg(port, S3C2410_UMSTAT); > > > > > > > > if (umstat & S3C2410_UMSTAT_CTS) > > > > return TIOCM_CAR | TIOCM_DSR | TIOCM_CTS; @@ - > > > 1974,7 +2009,7 @@ > > > > static int s3c24xx_serial_probe(struct platform_device *pdev) > > > > struct device_node *np = pdev->dev.of_node; > > > > struct s3c24xx_uart_port *ourport; > > > > int index = probe_index; > > > > - int ret; > > > > + int ret, prop = 0; > > > > > > > > if (np) { > > > > ret = of_alias_get_id(np, "serial"); @@ -2000,10 > > > +2035,29 @@ static > > > > int s3c24xx_serial_probe(struct platform_device *pdev) > > > > dev_get_platdata(&pdev->dev) : > > > > ourport->drv_data->def_cfg; > > > > > > > > - if (np) > > > > + if (np) { > > > > of_property_read_u32(np, > > > > "samsung,uart-fifosize", &ourport->port.fifosize); > > > > > > > > + if (of_property_read_u32(np, "reg-io-width", &prop) == > > > 0) { > > > > + switch (prop) { > > > > + case 1: > > > > + ourport->port.iotype = UPIO_MEM; > > > > + break; > > > > + case 4: > > > > + ourport->port.iotype = UPIO_MEM32; > > > > + break; > > > > + default: > > > > + dev_warn(&pdev->dev, "unsupported > > > reg-io-width (%d)\n", > > > > + prop); > > > > + ret = -EINVAL; > > > > + break; > > > > + } > > > > + } else { > > > > + ourport->port.iotype = UPIO_MEM; > > > > + } > > > > + } > > > > > > I think this still breaks all non-DT platforms (e.g. s3c). > > > > > > Best regards, > > > Krzysztof > > > > Thank you for your comment. > > I hope ourport->port.iotype is initialized by below table for non-DT > > platforms > > Indeed, you're right. In this case, this else() you added is not needed. > The default value for non-DT and existing DT platforms will be the same > (UPIO_MEM). > > Best regards, > Krzysztof Thank you for your comment. I will remove this line also in v3 + } else { + ourport->port.iotype = UPIO_MEM;
diff --git a/drivers/tty/serial/samsung_tty.c b/drivers/tty/serial/samsung_tty.c index 73f951d65b93..826d8c5846a6 100644 --- a/drivers/tty/serial/samsung_tty.c +++ b/drivers/tty/serial/samsung_tty.c @@ -154,12 +154,47 @@ struct s3c24xx_uart_port { #define portaddrl(port, reg) \ ((unsigned long *)(unsigned long)((port)->membase + (reg))) -#define rd_regb(port, reg) (readb_relaxed(portaddr(port, reg))) +static unsigned int rd_reg(struct uart_port *port, int reg) +{ + switch (port->iotype) { + case UPIO_MEM: + return readb_relaxed(portaddr(port, reg)); + case UPIO_MEM32: + return readl_relaxed(portaddr(port, reg)); + default: + return 0; + } + return 0; +} + #define rd_regl(port, reg) (readl_relaxed(portaddr(port, reg))) -#define wr_regb(port, reg, val) writeb_relaxed(val, portaddr(port, reg)) +static void wr_reg(struct uart_port *port, int reg, int val) +{ + switch (port->iotype) { + case UPIO_MEM: + writeb_relaxed(val, portaddr(port, reg)); + break; + case UPIO_MEM32: + writel_relaxed(val, portaddr(port, reg)); + break; + } +} + #define wr_regl(port, reg, val) writel_relaxed(val, portaddr(port, reg)) +static void write_buf(struct uart_port *port, int reg, int val) +{ + switch (port->iotype) { + case UPIO_MEM: + writeb(val, portaddr(port, reg)); + break; + case UPIO_MEM32: + writel(val, portaddr(port, reg)); + break; + } +} + /* Byte-order aware bit setting/clearing functions. */ static inline void s3c24xx_set_bit(struct uart_port *port, int idx, @@ -714,7 +749,7 @@ static void s3c24xx_serial_rx_drain_fifo(struct s3c24xx_uart_port *ourport) fifocnt--; uerstat = rd_regl(port, S3C2410_UERSTAT); - ch = rd_regb(port, S3C2410_URXH); + ch = rd_reg(port, S3C2410_URXH); if (port->flags & UPF_CONS_FLOW) { int txe = s3c24xx_serial_txempty_nofifo(port); @@ -826,7 +861,7 @@ static irqreturn_t s3c24xx_serial_tx_chars(int irq, void *id) } if (port->x_char) { - wr_regb(port, S3C2410_UTXH, port->x_char); + wr_reg(port, S3C2410_UTXH, port->x_char); port->icount.tx++; port->x_char = 0; goto out; @@ -852,7 +887,7 @@ static irqreturn_t s3c24xx_serial_tx_chars(int irq, void *id) if (rd_regl(port, S3C2410_UFSTAT) & ourport->info->tx_fifofull) break; - wr_regb(port, S3C2410_UTXH, xmit->buf[xmit->tail]); + wr_reg(port, S3C2410_UTXH, xmit->buf[xmit->tail]); xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); port->icount.tx++; count--; @@ -916,7 +951,7 @@ static unsigned int s3c24xx_serial_tx_empty(struct uart_port *port) /* no modem control lines */ static unsigned int s3c24xx_serial_get_mctrl(struct uart_port *port) { - unsigned int umstat = rd_regb(port, S3C2410_UMSTAT); + unsigned int umstat = rd_reg(port, S3C2410_UMSTAT); if (umstat & S3C2410_UMSTAT_CTS) return TIOCM_CAR | TIOCM_DSR | TIOCM_CTS; @@ -1974,7 +2009,7 @@ static int s3c24xx_serial_probe(struct platform_device *pdev) struct device_node *np = pdev->dev.of_node; struct s3c24xx_uart_port *ourport; int index = probe_index; - int ret; + int ret, prop = 0; if (np) { ret = of_alias_get_id(np, "serial"); @@ -2000,10 +2035,29 @@ static int s3c24xx_serial_probe(struct platform_device *pdev) dev_get_platdata(&pdev->dev) : ourport->drv_data->def_cfg; - if (np) + if (np) { of_property_read_u32(np, "samsung,uart-fifosize", &ourport->port.fifosize); + if (of_property_read_u32(np, "reg-io-width", &prop) == 0) { + switch (prop) { + case 1: + ourport->port.iotype = UPIO_MEM; + break; + case 4: + ourport->port.iotype = UPIO_MEM32; + break; + default: + dev_warn(&pdev->dev, "unsupported reg-io-width (%d)\n", + prop); + ret = -EINVAL; + break; + } + } else { + ourport->port.iotype = UPIO_MEM; + } + } + if (ourport->drv_data->fifosize[index]) ourport->port.fifosize = ourport->drv_data->fifosize[index]; else if (ourport->info->fifosize) @@ -2185,7 +2239,7 @@ static int s3c24xx_serial_get_poll_char(struct uart_port *port) if (s3c24xx_serial_rx_fifocnt(ourport, ufstat) == 0) return NO_POLL_CHAR; - return rd_regb(port, S3C2410_URXH); + return rd_reg(port, S3C2410_URXH); } static void s3c24xx_serial_put_poll_char(struct uart_port *port, @@ -2200,7 +2254,7 @@ static void s3c24xx_serial_put_poll_char(struct uart_port *port, while (!s3c24xx_serial_console_txrdy(port, ufcon)) cpu_relax(); - wr_regb(port, S3C2410_UTXH, c); + wr_reg(port, S3C2410_UTXH, c); } #endif /* CONFIG_CONSOLE_POLL */ @@ -2212,7 +2266,7 @@ s3c24xx_serial_console_putchar(struct uart_port *port, int ch) while (!s3c24xx_serial_console_txrdy(port, ufcon)) cpu_relax(); - wr_regb(port, S3C2410_UTXH, ch); + wr_reg(port, S3C2410_UTXH, ch); } static void @@ -2612,7 +2666,7 @@ static void samsung_early_putc(struct uart_port *port, int c) else samsung_early_busyuart(port); - writeb(c, port->membase + S3C2410_UTXH); + write_buf(port, S3C2410_UTXH, c); } static void samsung_early_write(struct console *con, const char *s,
Support 32-bit access for the TX/RX hold registers UTXH and URXH. This is required for some newer SoCs. Signed-off-by: Hyunki Koo <hyunki00.koo@samsung.com> --- drivers/tty/serial/samsung_tty.c | 78 +++++++++++++++++++++++++++++++++------- 1 file changed, 66 insertions(+), 12 deletions(-)