From patchwork Sat Aug 29 17:25:31 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 11744605 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B020813B1 for ; Sat, 29 Aug 2020 17:25:58 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 9995320BED for ; Sat, 29 Aug 2020 17:25:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1598721958; bh=nRhkqYcTGAk69BeB3yEs3mP59lvOEI+VgG69O0TBHeo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=yTzscLjHYBvV7bpjcpzR4K+jTF8LUxK0hQjp5RIH3yLdSu4z7VwIcCE3Vfz/nzzvs 4b0LPyyZKputFbedopvc7brjj6a4+B0akMfwDZ3VBDCTL8jsJUv5sJ5ZfH15aWAdCK DWHVlUCCS9nGhvN/htGjdUweSEmyvv597GoVU3eQ= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728348AbgH2RZv (ORCPT ); Sat, 29 Aug 2020 13:25:51 -0400 Received: from mail.kernel.org ([198.145.29.99]:59760 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728335AbgH2RZu (ORCPT ); Sat, 29 Aug 2020 13:25:50 -0400 Received: from localhost.localdomain (unknown [194.230.155.216]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id B75252074A; Sat, 29 Aug 2020 17:25:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1598721949; bh=nRhkqYcTGAk69BeB3yEs3mP59lvOEI+VgG69O0TBHeo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=SNEO2opzvqmgxsWGfLRLM80Zk2/ifz5ocHMwSdfHOTK0kW+dNh5fL7GajsQI9PoJ+ ZOhNTsGiDS8OqkmehvUuZsLPGYslV/++iDwt6fM1TeSTTzzRVRcZI8SwQvypYM+YM9 OGU3t23CIp8fWeT+eqM0ca8hynmdyhuMGHdRQfY8= From: Krzysztof Kozlowski To: Thierry Reding , Sam Ravnborg , David Airlie , Daniel Vetter , Rob Herring , Kukjin Kim , Krzysztof Kozlowski , Hoegeun Kwon , dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org Cc: Marek Szyprowski , Bartlomiej Zolnierkiewicz , Sylwester Nawrocki Subject: [RFT 3/4] ARM: dts: exynos: Move CMU assigned ISP clocks to buses in Exynos3250 Date: Sat, 29 Aug 2020 19:25:31 +0200 Message-Id: <20200829172532.29358-3-krzk@kernel.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200829172532.29358-1-krzk@kernel.org> References: <20200829172532.29358-1-krzk@kernel.org> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org Commit 52005dece527 ("ARM: dts: Add assigned clock parents to CMU node for exynos3250") added assigned clocks under Clock Management Unit to fix hangs when accessing ISP registers. This is not the place for it as CMU does not have a required "clocks" property: arch/arm/boot/dts/exynos3250-artik5-eval.dt.yaml: clock-controller@10030000: 'clocks' is a dependency of 'assigned-clocks' Signed-off-by: Krzysztof Kozlowski --- Not tested and I wonder whether actually correct. For example, what will happen if devfreq (exynos-bus) is not built in? Could someone verify it? --- arch/arm/boot/dts/exynos3250.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi index c67c70e46794..6d467022d929 100644 --- a/arch/arm/boot/dts/exynos3250.dtsi +++ b/arch/arm/boot/dts/exynos3250.dtsi @@ -214,10 +214,6 @@ compatible = "samsung,exynos3250-cmu"; reg = <0x10030000 0x20000>; #clock-cells = <1>; - assigned-clocks = <&cmu CLK_MOUT_ACLK_400_MCUISP_SUB>, - <&cmu CLK_MOUT_ACLK_266_SUB>; - assigned-clock-parents = <&cmu CLK_FIN_PLL>, - <&cmu CLK_FIN_PLL>; }; cmu_dmc: clock-controller@105c0000 { @@ -835,6 +831,8 @@ compatible = "samsung,exynos-bus"; clocks = <&cmu CLK_DIV_ACLK_400_MCUISP>; clock-names = "bus"; + assigned-clocks = <&cmu CLK_MOUT_ACLK_400_MCUISP_SUB>; + assigned-clock-parents = <&cmu CLK_FIN_PLL>; operating-points-v2 = <&bus_mcuisp_opp_table>; status = "disabled"; }; @@ -843,6 +841,8 @@ compatible = "samsung,exynos-bus"; clocks = <&cmu CLK_DIV_ACLK_266>; clock-names = "bus"; + assigned-clocks = <&cmu CLK_MOUT_ACLK_266_SUB>; + assigned-clock-parents = <&cmu CLK_FIN_PLL>; operating-points-v2 = <&bus_isp_opp_table>; status = "disabled"; };