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Wed, 4 Nov 2020 10:37:26 +0000 (GMT) From: Sylwester Nawrocki To: georgi.djakov@linaro.org, cw00.choi@samsung.com, krzk@kernel.org Cc: devicetree@vger.kernel.org, robh+dt@kernel.org, a.swigon@samsung.com, myungjoo.ham@samsung.com, inki.dae@samsung.com, sw0312.kim@samsung.com, b.zolnierkie@samsung.com, m.szyprowski@samsung.com, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-samsung-soc@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, s.nawrocki@samsung.com Subject: [PATCH v8 5/7] ARM: dts: exynos: Add interconnect properties to Exynos4412 bus nodes Date: Wed, 4 Nov 2020 11:36:55 +0100 Message-Id: <20201104103657.18007-6-s.nawrocki@samsung.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201104103657.18007-1-s.nawrocki@samsung.com> MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA01Sa0hTYRjmO7cdpSPHdXuxSBoFJZVKBR8k5Q0ZUhj96EdWa9VhWZvGjmYa ZLE00xTRUDM1KytbpDbXkJUybF7KG1prmdWE7F5aeQEzZs6j5b/nfZ/n+d7ngY8l5Q7aj42L TxT08WqtgvGmLC0TXes1566rgmqzOOwqT0f4fnENjZ2jH2l81d5F4+djwwwuajAxON+VR+Hu 7loZNr17QeNn1lIGj+TYES7ubiTwPfsbGe4/W8Xg9Aa7DD/+dp7GxQWfmVBfpcl4gVG+fvGI UbqyWwllXWWaMtdsRMoR04qdzB7vkMOCNu6EoA/cesD7SKejmj5u5k8WOHLRGXSVy0JeLPCb oM5pIzxYzlchaCk9lYW8p/EogrIiKyENIwh+ljvQnGPyxx2ZRNxGYO2tYP5ZpqqHZB4VwwdD TnPujGMRHwkZ78spj4jkM0mw1OeTHmIhrwK30zljoPjVcNv8kM5CLMvxW6DUcFS65g93a20z ci8+BHpGDDNyjveFJ5cHKQ8mpzWGB1dIz/vAT8igwXSfksyR0DjQQUt4IXxpNcskvBzaCy5S ksGA4OLDfpk05CFwtVbMFt0Cr7t+M55EJL8WaqyB0joM6ly3CM8aeB94+d1XCuED+ZYiUlpz kJkhl9SrYNJYREjYD7IHp2ajKeHmuJvIQytL5tUpmVen5P/dCkQa0VIhSdRpBDE4XkjeIKp1 YlK8ZsOhBJ0JTX+2dnfrr3o01nuwCfEsUizgbJZrKjmtPiGm6JoQsKRiERfe2b5fzh1Wp6QK +gSVPkkriE1oGUsplnIbr3/eJ+c16kThmCAcF/RzLMF6+Z1B/lXhm2sSYx2X0t3bQqkYy9Nh +3Cnue90yPvnjd8jOnw0bW557GDI28pCh/FVik/dx7KvkRG2gcaYxLxB07qAnvpo7ZrJHanj 0bvD+nqT28Kao2452e3ronQZv7q3HgpojnpcUVhdMrQkaPEH8QvRZ/WLTN2bVvZn1yctydy4 m71aQYlH1MEBpF5U/wXJ/8veaAMAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrGIsWRmVeSWpSXmKPExsVy+t/xe7ppLYviDS5t1re4P6+V0WLjjPWs Fte/PGe1mH/kHKvFla/v2Sym793EZjHp/gQWi/PnN7BbbHp8jdXi8q45bBafe48wWsw4v4/J Yu2Ru+wWtxtXsFm07j3CbnH4TTurxYzJL9kcBD02repk87hzbQ+bx/3u40wem5fUe/RtWcXo 8XmTXABblJ5NUX5pSapCRn5xia1StKGFkZ6hpYWekYmlnqGxeayVkamSvp1NSmpOZllqkb5d gl7G2avrWAu2CFRMvtrH2MA4n7eLkZNDQsBE4veHlexdjFwcQgJLGSV2nX0K5HAAJaQk5rco QdQIS/y51sUGUfOJUeLH2YdsIAk2AUOJ3qN9jCC2iICHxKnWtawgNrPADGaJ07NMQeYIC8RK 7NzGBxJmEVCVWL5lNytImFfAWmJOcxbEeHmJ1RsOMIPYnAI2Ehc/N7OD2EJAJYufn2MCsXkF BCVOznzCAtLKLKAusX6eEMQieYnmrbOZJzAKzkJSNQuhahaSqgWMzKsYRVJLi3PTc4uN9IoT c4tL89L1kvNzNzEC43TbsZ9bdjB2vQs+xCjAwajEw3tg28J4IdbEsuLK3EOMEhzMSiK8TmdP xwnxpiRWVqUW5ccXleakFh9iNAX6bCKzlGhyPjCF5JXEG5oamltYGpobmxubWSiJ83YIHIwR EkhPLEnNTk0tSC2C6WPi4JRqYFzukXgt4eepbzcY9A75r+7WMqzYsjvwgKJK7x7NF7/M78o9 MWtZ5PrHKNN+lqlT/sTdgW0Rd4oyz6p+//g2oMtQYQKn7NrI0g1K1bPn7lvVxVO4W2gG/xUH jodvfLp/1y3cqX5T4l1HfuqK5knHuvwiv1zkq3q+72ZK6OJFngvm/ecRqfbQUFNiKc5INNRi LipOBADta0Q06QIAAA== X-CMS-MailID: 20201104103726eucas1p248b51b25f5ee42898bf03e9cb2229c5d X-Msg-Generator: CA X-RootMTR: 20201104103726eucas1p248b51b25f5ee42898bf03e9cb2229c5d X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20201104103726eucas1p248b51b25f5ee42898bf03e9cb2229c5d References: <20201104103657.18007-1-s.nawrocki@samsung.com> Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org This patch adds the following properties for Exynos4412 interconnect bus nodes: - interconnects: to declare connections between nodes in order to guarantee PM QoS requirements between nodes, - #interconnect-cells: required by the interconnect framework, - samsung,data-clk-ratio: which allows to specify minimum data clock frequency corresponding to requested bandwidth for each bus. Note that #interconnect-cells is always zero and node IDs are not hardcoded anywhere. Signed-off-by: Artur Świgoń Signed-off-by: Sylwester Nawrocki Reviewed-by: Chanwoo Choi --- Changes for v8: - none. Changes for v7: - adjusted to the DT property changes: "interconnects" instead of "samsung,interconnect-parent", "samsung,data-clk-ratio" instead of "bus-width". Changes for v6: - added bus-width property in bus_dmc node. Changes for v5: - adjust to renamed exynos,interconnect-parent-node property, - add properties in common exynos4412.dtsi file rather than in Odroid specific odroid4412-odroid-common.dtsi. --- arch/arm/boot/dts/exynos4412.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm/boot/dts/exynos4412.dtsi b/arch/arm/boot/dts/exynos4412.dtsi index e76881d..4999e68 100644 --- a/arch/arm/boot/dts/exynos4412.dtsi +++ b/arch/arm/boot/dts/exynos4412.dtsi @@ -383,6 +383,8 @@ clocks = <&clock CLK_DIV_DMC>; clock-names = "bus"; operating-points-v2 = <&bus_dmc_opp_table>; + samsung,data-clock-ratio = <4>; + #interconnect-cells = <0>; status = "disabled"; }; @@ -452,6 +454,8 @@ clocks = <&clock CLK_DIV_GDL>; clock-names = "bus"; operating-points-v2 = <&bus_leftbus_opp_table>; + interconnects = <&bus_dmc>; + #interconnect-cells = <0>; status = "disabled"; }; @@ -468,6 +472,8 @@ clocks = <&clock CLK_ACLK160>; clock-names = "bus"; operating-points-v2 = <&bus_display_opp_table>; + interconnects = <&bus_leftbus &bus_dmc>; + #interconnect-cells = <0>; status = "disabled"; };