| Message ID | 20220308142410.3193729-2-vincent.whitchurch@axis.com (mailing list archive) |
|---|---|
| State | Not Applicable |
| Headers | show |
| Series | clocksource: Add MCT support for ARTPEC-8 | expand |
On 08/03/2022 15:24, Vincent Whitchurch wrote: > This SoC has an MCT with 4 global and 8 local timer interrupts, add a > specific compatible to match it as is done for the other platforms with > this hardware block. > > Signed-off-by: Vincent Whitchurch <vincent.whitchurch@axis.com> > --- > > Notes: > v2: New. Requires Krzysztof's "dt-bindings: timer: exynos4210-mct: describe > hardware and its interrupts". > Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml b/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml index 1584944c7ac4..dce42f1f7574 100644 --- a/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml +++ b/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml @@ -25,6 +25,7 @@ properties: - samsung,exynos4412-mct - items: - enum: + - axis,artpec8-mct - samsung,exynos3250-mct - samsung,exynos5250-mct - samsung,exynos5260-mct @@ -102,6 +103,7 @@ allOf: compatible: contains: enum: + - axis,artpec8-mct - samsung,exynos5260-mct - samsung,exynos5420-mct - samsung,exynos5433-mct
This SoC has an MCT with 4 global and 8 local timer interrupts, add a specific compatible to match it as is done for the other platforms with this hardware block. Signed-off-by: Vincent Whitchurch <vincent.whitchurch@axis.com> --- Notes: v2: New. Requires Krzysztof's "dt-bindings: timer: exynos4210-mct: describe hardware and its interrupts". .../devicetree/bindings/timer/samsung,exynos4210-mct.yaml | 2 ++ 1 file changed, 2 insertions(+)