Message ID | 20220311094515.3223023-2-vincent.whitchurch@axis.com (mailing list archive) |
---|---|
State | Accepted |
Commit | 02a64ef64c4efb3707e670cdde27afe352c7c143 |
Headers | show |
Series | Add support for ARTPEC-8 UART | expand |
On 11/03/2022 10:45, Vincent Whitchurch wrote: > Add a compatible for the UART on the ARTPEC-8 SoC. This hardware block > is closely related to the variants used on the Exynos chips. The > register layout is identical to Exynos850 et al but the fifo size is > different (64 bytes in each direction for all instances). > > Signed-off-by: Vincent Whitchurch <vincent.whitchurch@axis.com> > --- > Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Best regards, Krzysztof
On Fri, 11 Mar 2022 10:45:14 +0100, Vincent Whitchurch wrote: > Add a compatible for the UART on the ARTPEC-8 SoC. This hardware block > is closely related to the variants used on the Exynos chips. The > register layout is identical to Exynos850 et al but the fifo size is > different (64 bytes in each direction for all instances). > > Signed-off-by: Vincent Whitchurch <vincent.whitchurch@axis.com> > --- > > Notes: > v2: > - Expand commit message. > - Define required clocks. > > Documentation/devicetree/bindings/serial/samsung_uart.yaml | 2 ++ > 1 file changed, 2 insertions(+) > Reviewed-by: Rob Herring <robh@kernel.org>
diff --git a/Documentation/devicetree/bindings/serial/samsung_uart.yaml b/Documentation/devicetree/bindings/serial/samsung_uart.yaml index 2940afb874b3..c2423144a4d6 100644 --- a/Documentation/devicetree/bindings/serial/samsung_uart.yaml +++ b/Documentation/devicetree/bindings/serial/samsung_uart.yaml @@ -20,6 +20,7 @@ properties: items: - enum: - apple,s5l-uart + - axis,artpec8-uart - samsung,s3c2410-uart - samsung,s3c2412-uart - samsung,s3c2440-uart @@ -110,6 +111,7 @@ allOf: contains: enum: - apple,s5l-uart + - axis,artpec8-uart - samsung,exynos4210-uart then: properties:
Add a compatible for the UART on the ARTPEC-8 SoC. This hardware block is closely related to the variants used on the Exynos chips. The register layout is identical to Exynos850 et al but the fifo size is different (64 bytes in each direction for all instances). Signed-off-by: Vincent Whitchurch <vincent.whitchurch@axis.com> --- Notes: v2: - Expand commit message. - Define required clocks. Documentation/devicetree/bindings/serial/samsung_uart.yaml | 2 ++ 1 file changed, 2 insertions(+)