| Message ID | 20220916113951.228398-2-vincent.whitchurch@axis.com (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | b85ad8a54e0a446b3daa7f526e4996ddb6d4373f |
| Headers | show |
| Series | spi: Fix DMA bugs in (not only) spi-s3c64xx | expand |
On Fri, Sep 16, 2022 at 01:39:48PM +0200, Vincent Whitchurch wrote: > Add a test where a small and a large transfer in a message hit the same > cache line. This test currently fails on spi-s3c64xx on in DMA mode > since it ends up mixing DMA and PIO without proper cache maintenance. To make life easier with sending fixes as such fixes should come at the start of a patch series and new features at the end. This avoids creating spurious dependencies.
diff --git a/drivers/spi/spi-loopback-test.c b/drivers/spi/spi-loopback-test.c index 4d4f77a186a9..dd7de8fa37d0 100644 --- a/drivers/spi/spi-loopback-test.c +++ b/drivers/spi/spi-loopback-test.c @@ -313,6 +313,33 @@ static struct spi_test spi_tests[] = { }, }, }, + { + .description = "three tx+rx transfers with overlapping cache lines", + .fill_option = FILL_COUNT_8, + /* + * This should be large enough for the controller driver to + * choose to transfer it with DMA. + */ + .iterate_len = { 512, -1 }, + .iterate_transfer_mask = BIT(1), + .transfer_count = 3, + .transfers = { + { + .len = 1, + .tx_buf = TX(0), + .rx_buf = RX(0), + }, + { + .tx_buf = TX(1), + .rx_buf = RX(1), + }, + { + .len = 1, + .tx_buf = TX(513), + .rx_buf = RX(513), + }, + }, + }, { /* end of tests sequence */ } };
Add a test where a small and a large transfer in a message hit the same cache line. This test currently fails on spi-s3c64xx on in DMA mode since it ends up mixing DMA and PIO without proper cache maintenance. Signed-off-by: Vincent Whitchurch <vincent.whitchurch@axis.com> --- drivers/spi/spi-loopback-test.c | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+)