| Message ID | 20220916181731.89764-7-jagan@amarulasolutions.com (mailing list archive) |
|---|---|
| State | Not Applicable |
| Headers | show |
| Series | drm: bridge: Add Samsung MIPI DSIM bridge | expand |
Hi Jagan, On 16.09.2022 20:17, Jagan Teki wrote: > Look like an explicit fixing up of mode_flags is required for DSIM IP > present in i.MX8M Mini/Nano SoCs. > > At least the LCDIF + DSIM needs active low sync polarities in order > to correlate the correct sync flags of the surrounding components in > the chain to make sure the whole pipeline can work properly. > > On the other hand the i.MX 8M Mini Applications Processor Reference Manual, > Rev. 3, 11/2020 says. > "13.6.3.5.2 RGB interface > Vsync, Hsync, and VDEN are active high signals." > > No clear evidence about whether it can be documentation issues or > something, so added a comment FIXME for this and updated the active low > sync polarities using SAMSUNG_DSIM_TYPE_IMX8MM hw_type. > > v5: > * rebase based new bridge changes [mszyprow] > * remove DSIM_QUIRK_FIXUP_SYNC_POL > * add hw_type check for sync polarities change. > > v4: > * none > > v3: > * add DSIM_QUIRK_FIXUP_SYNC_POL to handle mode_flasg fixup > > v2: > * none > > v1: > * fix mode flags in atomic_check instead of mode_fixup > > Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> > --- > drivers/gpu/drm/bridge/samsung-dsim.c | 26 ++++++++++++++++++++++++++ > include/drm/bridge/samsung-dsim.h | 1 + > 2 files changed, 27 insertions(+) > > diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c b/drivers/gpu/drm/bridge/samsung-dsim.c > index 6d524338d4ff..8abf89326424 100644 > --- a/drivers/gpu/drm/bridge/samsung-dsim.c > +++ b/drivers/gpu/drm/bridge/samsung-dsim.c > @@ -1315,6 +1315,31 @@ static void samsung_dsim_atomic_post_disable(struct drm_bridge *bridge, > pm_runtime_put_sync(dsi->dev); > } > > +static int samsung_dsim_atomic_check(struct drm_bridge *bridge, > + struct drm_bridge_state *bridge_state, > + struct drm_crtc_state *crtc_state, > + struct drm_connector_state *conn_state) > +{ > + struct samsung_dsim *dsi = bridge_to_dsi(bridge); > + struct drm_display_mode *adjusted_mode = &crtc_state->adjusted_mode; > + > + if (dsi->plat_data->hw_type & SAMSUNG_DSIM_TYPE_IMX8MM) { Again the above should be 'if (dsi->plat_data->hw_type == SAMSUNG_DSIM_TYPE_IMX8MM)', hw_type is not a bitmask. > + /** > + * FIXME: > + * At least LCDIF + DSIM needs active low sync, > + * but i.MX 8M Mini Applications Processor Reference Manual, > + * Rev. 3, 11/2020 says > + * > + * 13.6.3.5.2 RGB interface > + * Vsync, Hsync, and VDEN are active high signals. > + */ > + adjusted_mode->flags |= (DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC); > + adjusted_mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC); > + } > + > + return 0; > +} > + > static void samsung_dsim_mode_set(struct drm_bridge *bridge, > const struct drm_display_mode *mode, > const struct drm_display_mode *adjusted_mode) > @@ -1337,6 +1362,7 @@ static const struct drm_bridge_funcs samsung_dsim_bridge_funcs = { > .atomic_duplicate_state = drm_atomic_helper_bridge_duplicate_state, > .atomic_destroy_state = drm_atomic_helper_bridge_destroy_state, > .atomic_reset = drm_atomic_helper_bridge_reset, > + .atomic_check = samsung_dsim_atomic_check, > .atomic_pre_enable = samsung_dsim_atomic_pre_enable, > .atomic_enable = samsung_dsim_atomic_enable, > .atomic_disable = samsung_dsim_atomic_disable, > diff --git a/include/drm/bridge/samsung-dsim.h b/include/drm/bridge/samsung-dsim.h > index 57b27d75369e..0c5a905f3de7 100644 > --- a/include/drm/bridge/samsung-dsim.h > +++ b/include/drm/bridge/samsung-dsim.h > @@ -27,6 +27,7 @@ enum samsung_dsim_type { > SAMSUNG_DSIM_TYPE_EXYNOS5410, > SAMSUNG_DSIM_TYPE_EXYNOS5422, > SAMSUNG_DSIM_TYPE_EXYNOS5433, > + SAMSUNG_DSIM_TYPE_IMX8MM, > SAMSUNG_DSIM_TYPE_COUNT, > }; > Best regards
diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c b/drivers/gpu/drm/bridge/samsung-dsim.c index 6d524338d4ff..8abf89326424 100644 --- a/drivers/gpu/drm/bridge/samsung-dsim.c +++ b/drivers/gpu/drm/bridge/samsung-dsim.c @@ -1315,6 +1315,31 @@ static void samsung_dsim_atomic_post_disable(struct drm_bridge *bridge, pm_runtime_put_sync(dsi->dev); } +static int samsung_dsim_atomic_check(struct drm_bridge *bridge, + struct drm_bridge_state *bridge_state, + struct drm_crtc_state *crtc_state, + struct drm_connector_state *conn_state) +{ + struct samsung_dsim *dsi = bridge_to_dsi(bridge); + struct drm_display_mode *adjusted_mode = &crtc_state->adjusted_mode; + + if (dsi->plat_data->hw_type & SAMSUNG_DSIM_TYPE_IMX8MM) { + /** + * FIXME: + * At least LCDIF + DSIM needs active low sync, + * but i.MX 8M Mini Applications Processor Reference Manual, + * Rev. 3, 11/2020 says + * + * 13.6.3.5.2 RGB interface + * Vsync, Hsync, and VDEN are active high signals. + */ + adjusted_mode->flags |= (DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC); + adjusted_mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC); + } + + return 0; +} + static void samsung_dsim_mode_set(struct drm_bridge *bridge, const struct drm_display_mode *mode, const struct drm_display_mode *adjusted_mode) @@ -1337,6 +1362,7 @@ static const struct drm_bridge_funcs samsung_dsim_bridge_funcs = { .atomic_duplicate_state = drm_atomic_helper_bridge_duplicate_state, .atomic_destroy_state = drm_atomic_helper_bridge_destroy_state, .atomic_reset = drm_atomic_helper_bridge_reset, + .atomic_check = samsung_dsim_atomic_check, .atomic_pre_enable = samsung_dsim_atomic_pre_enable, .atomic_enable = samsung_dsim_atomic_enable, .atomic_disable = samsung_dsim_atomic_disable, diff --git a/include/drm/bridge/samsung-dsim.h b/include/drm/bridge/samsung-dsim.h index 57b27d75369e..0c5a905f3de7 100644 --- a/include/drm/bridge/samsung-dsim.h +++ b/include/drm/bridge/samsung-dsim.h @@ -27,6 +27,7 @@ enum samsung_dsim_type { SAMSUNG_DSIM_TYPE_EXYNOS5410, SAMSUNG_DSIM_TYPE_EXYNOS5422, SAMSUNG_DSIM_TYPE_EXYNOS5433, + SAMSUNG_DSIM_TYPE_IMX8MM, SAMSUNG_DSIM_TYPE_COUNT, };
Look like an explicit fixing up of mode_flags is required for DSIM IP present in i.MX8M Mini/Nano SoCs. At least the LCDIF + DSIM needs active low sync polarities in order to correlate the correct sync flags of the surrounding components in the chain to make sure the whole pipeline can work properly. On the other hand the i.MX 8M Mini Applications Processor Reference Manual, Rev. 3, 11/2020 says. "13.6.3.5.2 RGB interface Vsync, Hsync, and VDEN are active high signals." No clear evidence about whether it can be documentation issues or something, so added a comment FIXME for this and updated the active low sync polarities using SAMSUNG_DSIM_TYPE_IMX8MM hw_type. v5: * rebase based new bridge changes [mszyprow] * remove DSIM_QUIRK_FIXUP_SYNC_POL * add hw_type check for sync polarities change. v4: * none v3: * add DSIM_QUIRK_FIXUP_SYNC_POL to handle mode_flasg fixup v2: * none v1: * fix mode flags in atomic_check instead of mode_fixup Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> --- drivers/gpu/drm/bridge/samsung-dsim.c | 26 ++++++++++++++++++++++++++ include/drm/bridge/samsung-dsim.h | 1 + 2 files changed, 27 insertions(+)