| Message ID | 20221010120438.80680-1-p.rajanbabu@samsung.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | arm64: dts: fix drive strength macros as per FSD HW UM | expand |
On 10/10/2022 08:04, Padmanabhan Rajanbabu wrote: > In FSD pinctrl implementation, the pinctrl driver is using drive strength > MACROs, which are deviating from the actual values specified in FSD HW UM But you are changing DTS, not pinctrl driver. The message is a bit confusing. Add full stop to the sentence. > > This patch adds the right pinctrl drive strength values for FSD SoC. This Do not use "This commit/patch". https://elixir.bootlin.com/linux/v5.17.1/source/Documentation/process/submitting-patches.rst#L95 > patch also ensures that the peripherals are using right drive strength > MACROs in-order to function as expected Full stop Which commit introduced it? Add a Fixes tag. > > Signed-off-by: Padmanabhan Rajanbabu <p.rajanbabu@samsung.com> > --- > arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi | 34 +++++++++++----------- > arch/arm64/boot/dts/tesla/fsd-pinctrl.h | 6 ++-- > 2 files changed, 20 insertions(+), 20 deletions(-) > > diff --git a/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi b/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi > index d0abb9aa0e9e..e3852c946352 100644 > --- a/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi > +++ b/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi > @@ -55,14 +55,14 @@ > samsung,pins = "gpf5-0"; > samsung,pin-function = <FSD_PIN_FUNC_2>; > samsung,pin-pud = <FSD_PIN_PULL_NONE>; > - samsung,pin-drv = <FSD_PIN_DRV_LV2>; > + samsung,pin-drv = <FSD_PIN_DRV_LV4>; Are you sure? The original commit used here value of "2", your change also set value of "2", so what deviates from actual values? You need to describe better the problem. Best regards, Krzysztof
> -----Original Message----- > From: Krzysztof Kozlowski [mailto:krzysztof.kozlowski@linaro.org] > Sent: 10 October 2022 06:54 PM > To: Padmanabhan Rajanbabu <p.rajanbabu@samsung.com>; > robh+dt@kernel.org; krzysztof.kozlowski+dt@linaro.org; > alim.akhtar@samsung.com; chanho61.park@samsung.com; > linus.walleij@linaro.org; pankaj.dubey@samsung.com > Cc: devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; linux- > samsung-soc@vger.kernel.org > Subject: Re: [PATCH] arm64: dts: fix drive strength macros as per FSD HW UM > > On 10/10/2022 08:04, Padmanabhan Rajanbabu wrote: > > In FSD pinctrl implementation, the pinctrl driver is using drive > > strength MACROs, which are deviating from the actual values specified > > in FSD HW UM > > But you are changing DTS, not pinctrl driver. The message is a bit confusing. Sorry about the commit description. I'll update it to reflect the right context. > > Add full stop to the sentence. okay > > > > > This patch adds the right pinctrl drive strength values for FSD SoC. > > This > > Do not use "This commit/patch". > https://protect2.fireeye.com/v1/url?k=7c0c10dd-239729b8-7c0d9b92- > 000babff32e3-25043687ce355c88&q=1&e=110f55cc-c214-4bfd-b74b- > 928d7f2efcbc&u=https%3A%2F%2Felixir.bootlin.com%2Flinux%2Fv5.17.1%2F > source%2FDocumentation%2Fprocess%2Fsubmitting-patches.rst%23L95 Okay. > > > patch also ensures that the peripherals are using right drive strength > > MACROs in-order to function as expected > > Full stop Okay. > > Which commit introduced it? Add a Fixes tag. I'll add the fixes tag. > > > > > > Signed-off-by: Padmanabhan Rajanbabu <p.rajanbabu@samsung.com> > > --- > > arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi | 34 +++++++++++----------- > > arch/arm64/boot/dts/tesla/fsd-pinctrl.h | 6 ++-- > > 2 files changed, 20 insertions(+), 20 deletions(-) > > > > diff --git a/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi > > b/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi > > index d0abb9aa0e9e..e3852c946352 100644 > > --- a/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi > > +++ b/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi > > @@ -55,14 +55,14 @@ > > samsung,pins = "gpf5-0"; > > samsung,pin-function = <FSD_PIN_FUNC_2>; > > samsung,pin-pud = <FSD_PIN_PULL_NONE>; > > - samsung,pin-drv = <FSD_PIN_DRV_LV2>; > > + samsung,pin-drv = <FSD_PIN_DRV_LV4>; > > Are you sure? The original commit used here value of "2", your change also > set value of "2", so what deviates from actual values? The intention of the patch is to change the value of MACROs as well as name of the MACROs according to the FSD HW user manual. > > You need to describe better the problem. In the next version, I'll update the problem description in a much better way. > > Best regards, > Krzysztof Thanks for quick review. Regards, Padmanabhan R.
>-----Original Message----- >From: Padmanabhan Rajanbabu [mailto:p.rajanbabu@samsung.com] >Sent: Monday, October 10, 2022 5:35 PM >To: robh+dt@kernel.org; krzysztof.kozlowski+dt@linaro.org; >alim.akhtar@samsung.com; chanho61.park@samsung.com; >linus.walleij@linaro.org; pankaj.dubey@samsung.com >Cc: devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; linux-samsung- >soc@vger.kernel.org; Padmanabhan Rajanbabu <p.rajanbabu@samsung.com> >Subject: [PATCH] arm64: dts: fix drive strength macros as per FSD HW UM > >In FSD pinctrl implementation, the pinctrl driver is using drive strength MACROs, >which are deviating from the actual values specified in FSD HW UM > >This patch adds the right pinctrl drive strength values for FSD SoC. This patch also >ensures that the peripherals are using right drive strength MACROs in-order to >function as expected > Please simply the commit message And a Fixes: tag (the original commit which introduce this change) >Signed-off-by: Padmanabhan Rajanbabu <p.rajanbabu@samsung.com> >--- > arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi | 34 +++++++++++----------- > arch/arm64/boot/dts/tesla/fsd-pinctrl.h | 6 ++-- > 2 files changed, 20 insertions(+), 20 deletions(-) > >diff --git a/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi >b/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi >index d0abb9aa0e9e..e3852c946352 100644 >--- a/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi >+++ b/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi >@@ -55,14 +55,14 @@ > samsung,pins = "gpf5-0"; > samsung,pin-function = <FSD_PIN_FUNC_2>; > samsung,pin-pud = <FSD_PIN_PULL_NONE>; >- samsung,pin-drv = <FSD_PIN_DRV_LV2>; >+ samsung,pin-drv = <FSD_PIN_DRV_LV4>; > }; > > ufs_refclk_out: ufs-refclk-out-pins { > samsung,pins = "gpf5-1"; > samsung,pin-function = <FSD_PIN_FUNC_2>; > samsung,pin-pud = <FSD_PIN_PULL_NONE>; >- samsung,pin-drv = <FSD_PIN_DRV_LV2>; >+ samsung,pin-drv = <FSD_PIN_DRV_LV4>; > }; > }; > >@@ -239,105 +239,105 @@ > samsung,pins = "gpb6-1"; > samsung,pin-function = <FSD_PIN_FUNC_2>; > samsung,pin-pud = <FSD_PIN_PULL_UP>; >- samsung,pin-drv = <FSD_PIN_DRV_LV2>; >+ samsung,pin-drv = <FSD_PIN_DRV_LV4>; > }; > > pwm1_out: pwm1-out-pins { > samsung,pins = "gpb6-5"; > samsung,pin-function = <FSD_PIN_FUNC_2>; > samsung,pin-pud = <FSD_PIN_PULL_UP>; >- samsung,pin-drv = <FSD_PIN_DRV_LV2>; >+ samsung,pin-drv = <FSD_PIN_DRV_LV4>; > }; > > hs_i2c0_bus: hs-i2c0-bus-pins { > samsung,pins = "gpb0-0", "gpb0-1"; > samsung,pin-function = <FSD_PIN_FUNC_2>; > samsung,pin-pud = <FSD_PIN_PULL_UP>; >- samsung,pin-drv = <FSD_PIN_DRV_LV1>; >+ samsung,pin-drv = <FSD_PIN_DRV_LV4>; > }; > > hs_i2c1_bus: hs-i2c1-bus-pins { > samsung,pins = "gpb0-2", "gpb0-3"; > samsung,pin-function = <FSD_PIN_FUNC_2>; > samsung,pin-pud = <FSD_PIN_PULL_UP>; >- samsung,pin-drv = <FSD_PIN_DRV_LV1>; >+ samsung,pin-drv = <FSD_PIN_DRV_LV4>; > }; > > hs_i2c2_bus: hs-i2c2-bus-pins { > samsung,pins = "gpb0-4", "gpb0-5"; > samsung,pin-function = <FSD_PIN_FUNC_2>; > samsung,pin-pud = <FSD_PIN_PULL_UP>; >- samsung,pin-drv = <FSD_PIN_DRV_LV1>; >+ samsung,pin-drv = <FSD_PIN_DRV_LV4>; > }; > > hs_i2c3_bus: hs-i2c3-bus-pins { > samsung,pins = "gpb0-6", "gpb0-7"; > samsung,pin-function = <FSD_PIN_FUNC_2>; > samsung,pin-pud = <FSD_PIN_PULL_UP>; >- samsung,pin-drv = <FSD_PIN_DRV_LV1>; >+ samsung,pin-drv = <FSD_PIN_DRV_LV4>; > }; > > hs_i2c4_bus: hs-i2c4-bus-pins { > samsung,pins = "gpb1-0", "gpb1-1"; > samsung,pin-function = <FSD_PIN_FUNC_2>; > samsung,pin-pud = <FSD_PIN_PULL_UP>; >- samsung,pin-drv = <FSD_PIN_DRV_LV1>; >+ samsung,pin-drv = <FSD_PIN_DRV_LV4>; > }; > > hs_i2c5_bus: hs-i2c5-bus-pins { > samsung,pins = "gpb1-2", "gpb1-3"; > samsung,pin-function = <FSD_PIN_FUNC_2>; > samsung,pin-pud = <FSD_PIN_PULL_UP>; >- samsung,pin-drv = <FSD_PIN_DRV_LV1>; >+ samsung,pin-drv = <FSD_PIN_DRV_LV4>; > }; > > hs_i2c6_bus: hs-i2c6-bus-pins { > samsung,pins = "gpb1-4", "gpb1-5"; > samsung,pin-function = <FSD_PIN_FUNC_2>; > samsung,pin-pud = <FSD_PIN_PULL_UP>; >- samsung,pin-drv = <FSD_PIN_DRV_LV1>; >+ samsung,pin-drv = <FSD_PIN_DRV_LV4>; > }; > > hs_i2c7_bus: hs-i2c7-bus-pins { > samsung,pins = "gpb1-6", "gpb1-7"; > samsung,pin-function = <FSD_PIN_FUNC_2>; > samsung,pin-pud = <FSD_PIN_PULL_UP>; >- samsung,pin-drv = <FSD_PIN_DRV_LV1>; >+ samsung,pin-drv = <FSD_PIN_DRV_LV4>; > }; > > uart0_data: uart0-data-pins { > samsung,pins = "gpb7-0", "gpb7-1"; > samsung,pin-function = <FSD_PIN_FUNC_2>; > samsung,pin-pud = <FSD_PIN_PULL_NONE>; >- samsung,pin-drv = <FSD_PIN_DRV_LV1>; >+ samsung,pin-drv = <FSD_PIN_DRV_LV4>; > }; > > uart1_data: uart1-data-pins { > samsung,pins = "gpb7-4", "gpb7-5"; > samsung,pin-function = <FSD_PIN_FUNC_2>; > samsung,pin-pud = <FSD_PIN_PULL_NONE>; >- samsung,pin-drv = <FSD_PIN_DRV_LV1>; >+ samsung,pin-drv = <FSD_PIN_DRV_LV4>; > }; > > spi0_bus: spi0-bus-pins { > samsung,pins = "gpb4-0", "gpb4-2", "gpb4-3"; > samsung,pin-function = <FSD_PIN_FUNC_2>; > samsung,pin-pud = <FSD_PIN_PULL_UP>; >- samsung,pin-drv = <FSD_PIN_DRV_LV1>; >+ samsung,pin-drv = <FSD_PIN_DRV_LV4>; > }; > > spi1_bus: spi1-bus-pins { > samsung,pins = "gpb4-4", "gpb4-6", "gpb4-7"; > samsung,pin-function = <FSD_PIN_FUNC_2>; > samsung,pin-pud = <FSD_PIN_PULL_UP>; >- samsung,pin-drv = <FSD_PIN_DRV_LV1>; >+ samsung,pin-drv = <FSD_PIN_DRV_LV4>; > }; > > spi2_bus: spi2-bus-pins { > samsung,pins = "gpb5-0", "gpb5-2", "gpb5-3"; > samsung,pin-function = <FSD_PIN_FUNC_2>; > samsung,pin-pud = <FSD_PIN_PULL_UP>; >- samsung,pin-drv = <FSD_PIN_DRV_LV1>; >+ samsung,pin-drv = <FSD_PIN_DRV_LV4>; > }; > }; > >diff --git a/arch/arm64/boot/dts/tesla/fsd-pinctrl.h >b/arch/arm64/boot/dts/tesla/fsd-pinctrl.h >index 6ffbda362493..c397d02208a0 100644 >--- a/arch/arm64/boot/dts/tesla/fsd-pinctrl.h >+++ b/arch/arm64/boot/dts/tesla/fsd-pinctrl.h >@@ -16,9 +16,9 @@ > #define FSD_PIN_PULL_UP 3 > > #define FSD_PIN_DRV_LV1 0 >-#define FSD_PIN_DRV_LV2 2 >-#define FSD_PIN_DRV_LV3 1 >-#define FSD_PIN_DRV_LV4 3 >+#define FSD_PIN_DRV_LV2 1 >+#define FSD_PIN_DRV_LV4 2 >+#define FSD_PIN_DRV_LV6 3 > I cross checked with update UM, this is the correct DRV levels. Thanks > #define FSD_PIN_FUNC_INPUT 0 > #define FSD_PIN_FUNC_OUTPUT 1 >-- >2.17.1
diff --git a/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi b/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi index d0abb9aa0e9e..e3852c946352 100644 --- a/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi +++ b/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi @@ -55,14 +55,14 @@ samsung,pins = "gpf5-0"; samsung,pin-function = <FSD_PIN_FUNC_2>; samsung,pin-pud = <FSD_PIN_PULL_NONE>; - samsung,pin-drv = <FSD_PIN_DRV_LV2>; + samsung,pin-drv = <FSD_PIN_DRV_LV4>; }; ufs_refclk_out: ufs-refclk-out-pins { samsung,pins = "gpf5-1"; samsung,pin-function = <FSD_PIN_FUNC_2>; samsung,pin-pud = <FSD_PIN_PULL_NONE>; - samsung,pin-drv = <FSD_PIN_DRV_LV2>; + samsung,pin-drv = <FSD_PIN_DRV_LV4>; }; }; @@ -239,105 +239,105 @@ samsung,pins = "gpb6-1"; samsung,pin-function = <FSD_PIN_FUNC_2>; samsung,pin-pud = <FSD_PIN_PULL_UP>; - samsung,pin-drv = <FSD_PIN_DRV_LV2>; + samsung,pin-drv = <FSD_PIN_DRV_LV4>; }; pwm1_out: pwm1-out-pins { samsung,pins = "gpb6-5"; samsung,pin-function = <FSD_PIN_FUNC_2>; samsung,pin-pud = <FSD_PIN_PULL_UP>; - samsung,pin-drv = <FSD_PIN_DRV_LV2>; + samsung,pin-drv = <FSD_PIN_DRV_LV4>; }; hs_i2c0_bus: hs-i2c0-bus-pins { samsung,pins = "gpb0-0", "gpb0-1"; samsung,pin-function = <FSD_PIN_FUNC_2>; samsung,pin-pud = <FSD_PIN_PULL_UP>; - samsung,pin-drv = <FSD_PIN_DRV_LV1>; + samsung,pin-drv = <FSD_PIN_DRV_LV4>; }; hs_i2c1_bus: hs-i2c1-bus-pins { samsung,pins = "gpb0-2", "gpb0-3"; samsung,pin-function = <FSD_PIN_FUNC_2>; samsung,pin-pud = <FSD_PIN_PULL_UP>; - samsung,pin-drv = <FSD_PIN_DRV_LV1>; + samsung,pin-drv = <FSD_PIN_DRV_LV4>; }; hs_i2c2_bus: hs-i2c2-bus-pins { samsung,pins = "gpb0-4", "gpb0-5"; samsung,pin-function = <FSD_PIN_FUNC_2>; samsung,pin-pud = <FSD_PIN_PULL_UP>; - samsung,pin-drv = <FSD_PIN_DRV_LV1>; + samsung,pin-drv = <FSD_PIN_DRV_LV4>; }; hs_i2c3_bus: hs-i2c3-bus-pins { samsung,pins = "gpb0-6", "gpb0-7"; samsung,pin-function = <FSD_PIN_FUNC_2>; samsung,pin-pud = <FSD_PIN_PULL_UP>; - samsung,pin-drv = <FSD_PIN_DRV_LV1>; + samsung,pin-drv = <FSD_PIN_DRV_LV4>; }; hs_i2c4_bus: hs-i2c4-bus-pins { samsung,pins = "gpb1-0", "gpb1-1"; samsung,pin-function = <FSD_PIN_FUNC_2>; samsung,pin-pud = <FSD_PIN_PULL_UP>; - samsung,pin-drv = <FSD_PIN_DRV_LV1>; + samsung,pin-drv = <FSD_PIN_DRV_LV4>; }; hs_i2c5_bus: hs-i2c5-bus-pins { samsung,pins = "gpb1-2", "gpb1-3"; samsung,pin-function = <FSD_PIN_FUNC_2>; samsung,pin-pud = <FSD_PIN_PULL_UP>; - samsung,pin-drv = <FSD_PIN_DRV_LV1>; + samsung,pin-drv = <FSD_PIN_DRV_LV4>; }; hs_i2c6_bus: hs-i2c6-bus-pins { samsung,pins = "gpb1-4", "gpb1-5"; samsung,pin-function = <FSD_PIN_FUNC_2>; samsung,pin-pud = <FSD_PIN_PULL_UP>; - samsung,pin-drv = <FSD_PIN_DRV_LV1>; + samsung,pin-drv = <FSD_PIN_DRV_LV4>; }; hs_i2c7_bus: hs-i2c7-bus-pins { samsung,pins = "gpb1-6", "gpb1-7"; samsung,pin-function = <FSD_PIN_FUNC_2>; samsung,pin-pud = <FSD_PIN_PULL_UP>; - samsung,pin-drv = <FSD_PIN_DRV_LV1>; + samsung,pin-drv = <FSD_PIN_DRV_LV4>; }; uart0_data: uart0-data-pins { samsung,pins = "gpb7-0", "gpb7-1"; samsung,pin-function = <FSD_PIN_FUNC_2>; samsung,pin-pud = <FSD_PIN_PULL_NONE>; - samsung,pin-drv = <FSD_PIN_DRV_LV1>; + samsung,pin-drv = <FSD_PIN_DRV_LV4>; }; uart1_data: uart1-data-pins { samsung,pins = "gpb7-4", "gpb7-5"; samsung,pin-function = <FSD_PIN_FUNC_2>; samsung,pin-pud = <FSD_PIN_PULL_NONE>; - samsung,pin-drv = <FSD_PIN_DRV_LV1>; + samsung,pin-drv = <FSD_PIN_DRV_LV4>; }; spi0_bus: spi0-bus-pins { samsung,pins = "gpb4-0", "gpb4-2", "gpb4-3"; samsung,pin-function = <FSD_PIN_FUNC_2>; samsung,pin-pud = <FSD_PIN_PULL_UP>; - samsung,pin-drv = <FSD_PIN_DRV_LV1>; + samsung,pin-drv = <FSD_PIN_DRV_LV4>; }; spi1_bus: spi1-bus-pins { samsung,pins = "gpb4-4", "gpb4-6", "gpb4-7"; samsung,pin-function = <FSD_PIN_FUNC_2>; samsung,pin-pud = <FSD_PIN_PULL_UP>; - samsung,pin-drv = <FSD_PIN_DRV_LV1>; + samsung,pin-drv = <FSD_PIN_DRV_LV4>; }; spi2_bus: spi2-bus-pins { samsung,pins = "gpb5-0", "gpb5-2", "gpb5-3"; samsung,pin-function = <FSD_PIN_FUNC_2>; samsung,pin-pud = <FSD_PIN_PULL_UP>; - samsung,pin-drv = <FSD_PIN_DRV_LV1>; + samsung,pin-drv = <FSD_PIN_DRV_LV4>; }; }; diff --git a/arch/arm64/boot/dts/tesla/fsd-pinctrl.h b/arch/arm64/boot/dts/tesla/fsd-pinctrl.h index 6ffbda362493..c397d02208a0 100644 --- a/arch/arm64/boot/dts/tesla/fsd-pinctrl.h +++ b/arch/arm64/boot/dts/tesla/fsd-pinctrl.h @@ -16,9 +16,9 @@ #define FSD_PIN_PULL_UP 3 #define FSD_PIN_DRV_LV1 0 -#define FSD_PIN_DRV_LV2 2 -#define FSD_PIN_DRV_LV3 1 -#define FSD_PIN_DRV_LV4 3 +#define FSD_PIN_DRV_LV2 1 +#define FSD_PIN_DRV_LV4 2 +#define FSD_PIN_DRV_LV6 3 #define FSD_PIN_FUNC_INPUT 0 #define FSD_PIN_FUNC_OUTPUT 1
In FSD pinctrl implementation, the pinctrl driver is using drive strength MACROs, which are deviating from the actual values specified in FSD HW UM This patch adds the right pinctrl drive strength values for FSD SoC. This patch also ensures that the peripherals are using right drive strength MACROs in-order to function as expected Signed-off-by: Padmanabhan Rajanbabu <p.rajanbabu@samsung.com> --- arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi | 34 +++++++++++----------- arch/arm64/boot/dts/tesla/fsd-pinctrl.h | 6 ++-- 2 files changed, 20 insertions(+), 20 deletions(-)