@@ -97,15 +97,19 @@ cpu@301 {
};
xgene_L2_0: l2-cache-0 {
compatible = "cache";
+ cache-level = <2>;
};
xgene_L2_1: l2-cache-1 {
compatible = "cache";
+ cache-level = <2>;
};
xgene_L2_2: l2-cache-2 {
compatible = "cache";
+ cache-level = <2>;
};
xgene_L2_3: l2-cache-3 {
compatible = "cache";
+ cache-level = <2>;
};
};
@@ -81,15 +81,19 @@ cpu@301 {
};
xgene_L2_0: l2-cache-0 {
compatible = "cache";
+ cache-level = <2>;
};
xgene_L2_1: l2-cache-1 {
compatible = "cache";
+ cache-level = <2>;
};
xgene_L2_2: l2-cache-2 {
compatible = "cache";
+ cache-level = <2>;
};
xgene_L2_3: l2-cache-3 {
compatible = "cache";
+ cache-level = <2>;
};
};
The DeviceTree Specification v0.3 specifies that the cache node 'compatible' and 'cache-level' properties are 'required'. Cf. s3.8 Multi-level and Shared Cache Nodes The 'cache-unified' property should be present if one of the properties for unified cache is present ('cache-size', ...). Update the Device Trees accordingly. Signed-off-by: Pierre Gondois <pierre.gondois@arm.com> --- arch/arm64/boot/dts/apm/apm-shadowcat.dtsi | 4 ++++ arch/arm64/boot/dts/apm/apm-storm.dtsi | 4 ++++ 2 files changed, 8 insertions(+)