diff mbox series

[v2,6/6] arm64: dts: fsd: Add support for error correction code for message RAM

Message ID 20221109100928.109478-7-vivek.2311@samsung.com (mailing list archive)
State New
Headers show
Series [v2,1/6] dt-bindings: Document the SYSREG specific compatibles found on FSD SoC | expand

Commit Message

Vivek Yadav Nov. 9, 2022, 10:09 a.m. UTC 
Add mram-ecc-cfg property which indicates the error correction code config
and enable the same for FSD platform.

In FSD, error correction code (ECC) is configured via PERIC SYSREG
registers.

Signed-off-by: Chandrasekar R <rcsekar@samsung.com>
Cc: devicetree@vger.kernel.org
Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: Rob Herring <robh+dt@kernel.org>
Signed-off-by: Vivek Yadav <vivek.2311@samsung.com>
---
 arch/arm64/boot/dts/tesla/fsd.dtsi | 4 ++++
 1 file changed, 4 insertions(+)

Comments

Krzysztof Kozlowski Nov. 9, 2022, 11:21 a.m. UTC | #1 
On 09/11/2022 11:09, Vivek Yadav wrote:
> Add mram-ecc-cfg property which indicates the error correction code config
> and enable the same for FSD platform.
> 
> In FSD, error correction code (ECC) is configured via PERIC SYSREG
> registers.
> 
> Signed-off-by: Chandrasekar R <rcsekar@samsung.com>
> Cc: devicetree@vger.kernel.org
> Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
> Cc: Rob Herring <robh+dt@kernel.org>
> Signed-off-by: Vivek Yadav <vivek.2311@samsung.com>
> ---

For net-folks: although the DTS patches are here as well, but they must
go via ARM SOC tree, so pick only network/can drivers and bindings when
they are ready.

Best regards,
Krzysztof
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/tesla/fsd.dtsi b/arch/arm64/boot/dts/tesla/fsd.dtsi
index 154fd3fc5895..6483bbf521e5 100644
--- a/arch/arm64/boot/dts/tesla/fsd.dtsi
+++ b/arch/arm64/boot/dts/tesla/fsd.dtsi
@@ -778,6 +778,7 @@ 
 			clocks = <&clock_peric PERIC_MCAN0_IPCLKPORT_PCLK>,
 				<&clock_peric PERIC_MCAN0_IPCLKPORT_CCLK>;
 			clock-names = "hclk", "cclk";
+			tesla,mram-ecc-cfg = <&sysreg_peric 0x700>;
 			bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
 			status = "disabled";
 		};
@@ -795,6 +796,7 @@ 
 			clocks = <&clock_peric PERIC_MCAN1_IPCLKPORT_PCLK>,
 				<&clock_peric PERIC_MCAN1_IPCLKPORT_CCLK>;
 			clock-names = "hclk", "cclk";
+			tesla,mram-ecc-cfg = <&sysreg_peric 0x704>;
 			bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
 			status = "disabled";
 		};
@@ -812,6 +814,7 @@ 
 			clocks = <&clock_peric PERIC_MCAN2_IPCLKPORT_PCLK>,
 				<&clock_peric PERIC_MCAN2_IPCLKPORT_CCLK>;
 			clock-names = "hclk", "cclk";
+			tesla,mram-ecc-cfg = <&sysreg_peric 0x708>;
 			bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
 			status = "disabled";
 		};
@@ -829,6 +832,7 @@ 
 			clocks = <&clock_peric PERIC_MCAN3_IPCLKPORT_PCLK>,
 				<&clock_peric PERIC_MCAN3_IPCLKPORT_CCLK>;
 			clock-names = "hclk", "cclk";
+			tesla,mram-ecc-cfg = <&sysreg_peric 0x70c>;
 			bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
 			status = "disabled";
 		};