| Message ID | 20230125094513.155063-2-krzysztof.kozlowski@linaro.org (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | eb87086bfc967f92a4f9c8e4a51754db03a04537 |
| Headers | show |
| Series | [1/9] ARM: dts: exynos: correct HDMI phy compatible in Exynos4 | expand |
Hi Krzysztof, On 25.01.2023 10:45, Krzysztof Kozlowski wrote: > The soc node is supposed to have only device nodes with MMIO addresses, > as reported by dtc W=1: > > arch/arm/boot/dts/exynos5420.dtsi:1070.24-1075.5: > Warning (simple_bus_reg): /soc/bus-wcore: missing or empty reg/ranges property > > and dtbs_check: > > exynos5420-arndale-octa.dtb: soc: bus-wcore: > {'compatible': ['samsung,exynos-bus'], 'clocks': [[2, 769]], 'clock-names': ['bus'], 'status': ['disabled']} should not be valid under {'type': 'object'} > > Move the bus nodes and their OPP tables out of SoC to fix this. > Re-order them alphabetically while moving and put some of the OPP tables > in device nodes (if they are not shared). > > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Frankly speaking I'm not very keen on moving those bus nodes out of /soc. Technically speaking this is definitely a part of soc and doesn't make much sense outside of it. IMHO they describe SoC hardware details and they might be moved somehow under clock controller device(s), although this would require some changes in the bindings and drivers. > --- > arch/arm/boot/dts/exynos5420.dtsi | 223 +++++++++++++++--------------- > 1 file changed, 111 insertions(+), 112 deletions(-) > > diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi > index 7efe72879dc4..cea92f175d46 100644 > --- a/arch/arm/boot/dts/exynos5420.dtsi > +++ b/arch/arm/boot/dts/exynos5420.dtsi > @@ -37,6 +37,117 @@ aliases { > spi2 = &spi_2; > }; > > + bus_disp1: bus-disp1 { > + compatible = "samsung,exynos-bus"; > + clocks = <&clock CLK_DOUT_ACLK400_DISP1>; > + clock-names = "bus"; > + status = "disabled"; > + }; > + > + bus_disp1_fimd: bus-disp1-fimd { > + compatible = "samsung,exynos-bus"; > + clocks = <&clock CLK_DOUT_ACLK300_DISP1>; > + clock-names = "bus"; > + status = "disabled"; > + }; > + > + bus_fsys: bus-fsys { > + compatible = "samsung,exynos-bus"; > + clocks = <&clock CLK_DOUT_ACLK200_FSYS>; > + clock-names = "bus"; > + status = "disabled"; > + }; > + > + bus_fsys2: bus-fsys2 { > + compatible = "samsung,exynos-bus"; > + clocks = <&clock CLK_DOUT_ACLK200_FSYS2>; > + clock-names = "bus"; > + status = "disabled"; > + }; > + > + bus_fsys_apb: bus-fsys-apb { > + compatible = "samsung,exynos-bus"; > + clocks = <&clock CLK_DOUT_PCLK200_FSYS>; > + clock-names = "bus"; > + status = "disabled"; > + }; > + > + bus_g2d: bus-g2d { > + compatible = "samsung,exynos-bus"; > + clocks = <&clock CLK_DOUT_ACLK333_G2D>; > + clock-names = "bus"; > + status = "disabled"; > + }; > + > + bus_g2d_acp: bus-g2d-acp { > + compatible = "samsung,exynos-bus"; > + clocks = <&clock CLK_DOUT_ACLK266_G2D>; > + clock-names = "bus"; > + status = "disabled"; > + }; > + bus_gen: bus-gen { > + compatible = "samsung,exynos-bus"; > + clocks = <&clock CLK_DOUT_ACLK266>; > + clock-names = "bus"; > + status = "disabled"; > + }; > + > + bus_gscl_scaler: bus-gscl-scaler { > + compatible = "samsung,exynos-bus"; > + clocks = <&clock CLK_DOUT_ACLK300_GSCL>; > + clock-names = "bus"; > + status = "disabled"; > + }; > + > + bus_jpeg: bus-jpeg { > + compatible = "samsung,exynos-bus"; > + clocks = <&clock CLK_DOUT_ACLK300_JPEG>; > + clock-names = "bus"; > + status = "disabled"; > + }; > + > + bus_jpeg_apb: bus-jpeg-apb { > + compatible = "samsung,exynos-bus"; > + clocks = <&clock CLK_DOUT_ACLK166>; > + clock-names = "bus"; > + status = "disabled"; > + }; > + > + bus_mfc: bus-mfc { > + compatible = "samsung,exynos-bus"; > + clocks = <&clock CLK_DOUT_ACLK333>; > + clock-names = "bus"; > + status = "disabled"; > + }; > + > + bus_mscl: bus-mscl { > + compatible = "samsung,exynos-bus"; > + clocks = <&clock CLK_DOUT_ACLK400_MSCL>; > + clock-names = "bus"; > + status = "disabled"; > + }; > + > + bus_noc: bus-noc { > + compatible = "samsung,exynos-bus"; > + clocks = <&clock CLK_DOUT_ACLK100_NOC>; > + clock-names = "bus"; > + status = "disabled"; > + }; > + > + bus_peri: bus-peri { > + compatible = "samsung,exynos-bus"; > + clocks = <&clock CLK_DOUT_ACLK66>; > + clock-names = "bus"; > + status = "disabled"; > + }; > + > + bus_wcore: bus-wcore { > + compatible = "samsung,exynos-bus"; > + clocks = <&clock CLK_DOUT_ACLK400_WCORE>; > + clock-names = "bus"; > + status = "disabled"; > + }; > + > /* > * The 'cpus' node is not present here but instead it is provided > * by exynos5420-cpus.dtsi or exynos5422-cpus.dtsi. > @@ -1066,118 +1177,6 @@ sysmmu_fimd1_1: sysmmu@14680000 { > power-domains = <&disp_pd>; > #iommu-cells = <0>; > }; > - > - bus_wcore: bus-wcore { > - compatible = "samsung,exynos-bus"; > - clocks = <&clock CLK_DOUT_ACLK400_WCORE>; > - clock-names = "bus"; > - status = "disabled"; > - }; > - > - bus_noc: bus-noc { > - compatible = "samsung,exynos-bus"; > - clocks = <&clock CLK_DOUT_ACLK100_NOC>; > - clock-names = "bus"; > - status = "disabled"; > - }; > - > - bus_fsys_apb: bus-fsys-apb { > - compatible = "samsung,exynos-bus"; > - clocks = <&clock CLK_DOUT_PCLK200_FSYS>; > - clock-names = "bus"; > - status = "disabled"; > - }; > - > - bus_fsys: bus-fsys { > - compatible = "samsung,exynos-bus"; > - clocks = <&clock CLK_DOUT_ACLK200_FSYS>; > - clock-names = "bus"; > - status = "disabled"; > - }; > - > - bus_fsys2: bus-fsys2 { > - compatible = "samsung,exynos-bus"; > - clocks = <&clock CLK_DOUT_ACLK200_FSYS2>; > - clock-names = "bus"; > - status = "disabled"; > - }; > - > - bus_mfc: bus-mfc { > - compatible = "samsung,exynos-bus"; > - clocks = <&clock CLK_DOUT_ACLK333>; > - clock-names = "bus"; > - status = "disabled"; > - }; > - > - bus_gen: bus-gen { > - compatible = "samsung,exynos-bus"; > - clocks = <&clock CLK_DOUT_ACLK266>; > - clock-names = "bus"; > - status = "disabled"; > - }; > - > - bus_peri: bus-peri { > - compatible = "samsung,exynos-bus"; > - clocks = <&clock CLK_DOUT_ACLK66>; > - clock-names = "bus"; > - status = "disabled"; > - }; > - > - bus_g2d: bus-g2d { > - compatible = "samsung,exynos-bus"; > - clocks = <&clock CLK_DOUT_ACLK333_G2D>; > - clock-names = "bus"; > - status = "disabled"; > - }; > - > - bus_g2d_acp: bus-g2d-acp { > - compatible = "samsung,exynos-bus"; > - clocks = <&clock CLK_DOUT_ACLK266_G2D>; > - clock-names = "bus"; > - status = "disabled"; > - }; > - > - bus_jpeg: bus-jpeg { > - compatible = "samsung,exynos-bus"; > - clocks = <&clock CLK_DOUT_ACLK300_JPEG>; > - clock-names = "bus"; > - status = "disabled"; > - }; > - > - bus_jpeg_apb: bus-jpeg-apb { > - compatible = "samsung,exynos-bus"; > - clocks = <&clock CLK_DOUT_ACLK166>; > - clock-names = "bus"; > - status = "disabled"; > - }; > - > - bus_disp1_fimd: bus-disp1-fimd { > - compatible = "samsung,exynos-bus"; > - clocks = <&clock CLK_DOUT_ACLK300_DISP1>; > - clock-names = "bus"; > - status = "disabled"; > - }; > - > - bus_disp1: bus-disp1 { > - compatible = "samsung,exynos-bus"; > - clocks = <&clock CLK_DOUT_ACLK400_DISP1>; > - clock-names = "bus"; > - status = "disabled"; > - }; > - > - bus_gscl_scaler: bus-gscl-scaler { > - compatible = "samsung,exynos-bus"; > - clocks = <&clock CLK_DOUT_ACLK300_GSCL>; > - clock-names = "bus"; > - status = "disabled"; > - }; > - > - bus_mscl: bus-mscl { > - compatible = "samsung,exynos-bus"; > - clocks = <&clock CLK_DOUT_ACLK400_MSCL>; > - clock-names = "bus"; > - status = "disabled"; > - }; > }; > > thermal-zones { Best regards
On 26/01/2023 10:47, Marek Szyprowski wrote: > Hi Krzysztof, > > On 25.01.2023 10:45, Krzysztof Kozlowski wrote: >> The soc node is supposed to have only device nodes with MMIO addresses, >> as reported by dtc W=1: >> >> arch/arm/boot/dts/exynos5420.dtsi:1070.24-1075.5: >> Warning (simple_bus_reg): /soc/bus-wcore: missing or empty reg/ranges property >> >> and dtbs_check: >> >> exynos5420-arndale-octa.dtb: soc: bus-wcore: >> {'compatible': ['samsung,exynos-bus'], 'clocks': [[2, 769]], 'clock-names': ['bus'], 'status': ['disabled']} should not be valid under {'type': 'object'} >> >> Move the bus nodes and their OPP tables out of SoC to fix this. >> Re-order them alphabetically while moving and put some of the OPP tables >> in device nodes (if they are not shared). >> >> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > > Frankly speaking I'm not very keen on moving those bus nodes out of > /soc. Technically speaking this is definitely a part of soc and doesn't > make much sense outside of it. IMHO they describe SoC hardware details > and they might be moved somehow under clock controller device(s), > although this would require some changes in the bindings and drivers. That's the only way to fix it without change of drivers any ABI compatibility issue. The same we do for Qualcomm interconnects, e.g. arch/arm64/boot/dts/qcom/sm8450.dtsi where some interconnects have some do not have MMIO space. I want to achieve finally clean dtbs_check run for all Exynos sources. The in-tree bindings already pass, so now I am fixing the ones coming from dtschema (simple-bus.yaml in particular). If you have any other idea how to seamlessly clean it up, I am happy to hear. But I guess the main problem is that no one is being paid for doing anything for Samsung Exynos, so for free not many put much effort into working on it. Best regards, Krzysztof
On 26/01/2023 11:59, Krzysztof Kozlowski wrote: > On 26/01/2023 10:47, Marek Szyprowski wrote: >> Hi Krzysztof, >> >> On 25.01.2023 10:45, Krzysztof Kozlowski wrote: >>> The soc node is supposed to have only device nodes with MMIO addresses, >>> as reported by dtc W=1: >>> >>> arch/arm/boot/dts/exynos5420.dtsi:1070.24-1075.5: >>> Warning (simple_bus_reg): /soc/bus-wcore: missing or empty reg/ranges property >>> >>> and dtbs_check: >>> >>> exynos5420-arndale-octa.dtb: soc: bus-wcore: >>> {'compatible': ['samsung,exynos-bus'], 'clocks': [[2, 769]], 'clock-names': ['bus'], 'status': ['disabled']} should not be valid under {'type': 'object'} >>> >>> Move the bus nodes and their OPP tables out of SoC to fix this. >>> Re-order them alphabetically while moving and put some of the OPP tables >>> in device nodes (if they are not shared). >>> >>> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> >> >> Frankly speaking I'm not very keen on moving those bus nodes out of >> /soc. Technically speaking this is definitely a part of soc and doesn't >> make much sense outside of it. IMHO they describe SoC hardware details >> and they might be moved somehow under clock controller device(s), >> although this would require some changes in the bindings and drivers. > > That's the only way to fix it without change of drivers any ABI > compatibility issue. The same we do for Qualcomm interconnects, e.g. > arch/arm64/boot/dts/qcom/sm8450.dtsi where some interconnects have some > do not have MMIO space. > > I want to achieve finally clean dtbs_check run for all Exynos sources. > The in-tree bindings already pass, so now I am fixing the ones coming > from dtschema (simple-bus.yaml in particular). > > If you have any other idea how to seamlessly clean it up, I am happy to > hear. But I guess the main problem is that no one is being paid for > doing anything for Samsung Exynos, so for free not many put much effort > into working on it. Marek, I value your feedback a lot and I appreciate your help here. Just to be clear that I am not ignoring it, little disclaimer: Unless there is a clear NAK from you or someone else, with an idea to fix or with a commitment to change driver/bindings, I am planning to grab these changes. I really want to get the dtbs_check done. With these and my other fixes, the arm64 exynos DTS pass fully all dtschema and in-kernel dtbs_check. Best regards, Krzysztof
On 28.01.2023 11:43, Krzysztof Kozlowski wrote: > On 26/01/2023 11:59, Krzysztof Kozlowski wrote: >> On 26/01/2023 10:47, Marek Szyprowski wrote: >>> Hi Krzysztof, >>> >>> On 25.01.2023 10:45, Krzysztof Kozlowski wrote: >>>> The soc node is supposed to have only device nodes with MMIO addresses, >>>> as reported by dtc W=1: >>>> >>>> arch/arm/boot/dts/exynos5420.dtsi:1070.24-1075.5: >>>> Warning (simple_bus_reg): /soc/bus-wcore: missing or empty reg/ranges property >>>> >>>> and dtbs_check: >>>> >>>> exynos5420-arndale-octa.dtb: soc: bus-wcore: >>>> {'compatible': ['samsung,exynos-bus'], 'clocks': [[2, 769]], 'clock-names': ['bus'], 'status': ['disabled']} should not be valid under {'type': 'object'} >>>> >>>> Move the bus nodes and their OPP tables out of SoC to fix this. >>>> Re-order them alphabetically while moving and put some of the OPP tables >>>> in device nodes (if they are not shared). >>>> >>>> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> >>> Frankly speaking I'm not very keen on moving those bus nodes out of >>> /soc. Technically speaking this is definitely a part of soc and doesn't >>> make much sense outside of it. IMHO they describe SoC hardware details >>> and they might be moved somehow under clock controller device(s), >>> although this would require some changes in the bindings and drivers. >> That's the only way to fix it without change of drivers any ABI >> compatibility issue. The same we do for Qualcomm interconnects, e.g. >> arch/arm64/boot/dts/qcom/sm8450.dtsi where some interconnects have some >> do not have MMIO space. >> >> I want to achieve finally clean dtbs_check run for all Exynos sources. >> The in-tree bindings already pass, so now I am fixing the ones coming >> from dtschema (simple-bus.yaml in particular). >> >> If you have any other idea how to seamlessly clean it up, I am happy to >> hear. But I guess the main problem is that no one is being paid for >> doing anything for Samsung Exynos, so for free not many put much effort >> into working on it. > Marek, I value your feedback a lot and I appreciate your help here. Just > to be clear that I am not ignoring it, little disclaimer: > > Unless there is a clear NAK from you or someone else, with an idea to > fix or with a commitment to change driver/bindings, I am planning to > grab these changes. > > I really want to get the dtbs_check done. With these and my other fixes, > the arm64 exynos DTS pass fully all dtschema and in-kernel dtbs_check. Go ahead. I won't block it. Best regards
On 25/01/2023 10:45, Krzysztof Kozlowski wrote: > The soc node is supposed to have only device nodes with MMIO addresses, > as reported by dtc W=1: > > arch/arm/boot/dts/exynos5420.dtsi:1070.24-1075.5: > Warning (simple_bus_reg): /soc/bus-wcore: missing or empty reg/ranges property > > and dtbs_check: > > exynos5420-arndale-octa.dtb: soc: bus-wcore: > {'compatible': ['samsung,exynos-bus'], 'clocks': [[2, 769]], 'clock-names': ['bus'], 'status': ['disabled']} should not be valid under {'type': 'object'} > > Move the bus nodes and their OPP tables out of SoC to fix this. > Re-order them alphabetically while moving and put some of the OPP tables > in device nodes (if they are not shared). Applied. Best regards, Krzysztof
diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi index 7efe72879dc4..cea92f175d46 100644 --- a/arch/arm/boot/dts/exynos5420.dtsi +++ b/arch/arm/boot/dts/exynos5420.dtsi @@ -37,6 +37,117 @@ aliases { spi2 = &spi_2; }; + bus_disp1: bus-disp1 { + compatible = "samsung,exynos-bus"; + clocks = <&clock CLK_DOUT_ACLK400_DISP1>; + clock-names = "bus"; + status = "disabled"; + }; + + bus_disp1_fimd: bus-disp1-fimd { + compatible = "samsung,exynos-bus"; + clocks = <&clock CLK_DOUT_ACLK300_DISP1>; + clock-names = "bus"; + status = "disabled"; + }; + + bus_fsys: bus-fsys { + compatible = "samsung,exynos-bus"; + clocks = <&clock CLK_DOUT_ACLK200_FSYS>; + clock-names = "bus"; + status = "disabled"; + }; + + bus_fsys2: bus-fsys2 { + compatible = "samsung,exynos-bus"; + clocks = <&clock CLK_DOUT_ACLK200_FSYS2>; + clock-names = "bus"; + status = "disabled"; + }; + + bus_fsys_apb: bus-fsys-apb { + compatible = "samsung,exynos-bus"; + clocks = <&clock CLK_DOUT_PCLK200_FSYS>; + clock-names = "bus"; + status = "disabled"; + }; + + bus_g2d: bus-g2d { + compatible = "samsung,exynos-bus"; + clocks = <&clock CLK_DOUT_ACLK333_G2D>; + clock-names = "bus"; + status = "disabled"; + }; + + bus_g2d_acp: bus-g2d-acp { + compatible = "samsung,exynos-bus"; + clocks = <&clock CLK_DOUT_ACLK266_G2D>; + clock-names = "bus"; + status = "disabled"; + }; + bus_gen: bus-gen { + compatible = "samsung,exynos-bus"; + clocks = <&clock CLK_DOUT_ACLK266>; + clock-names = "bus"; + status = "disabled"; + }; + + bus_gscl_scaler: bus-gscl-scaler { + compatible = "samsung,exynos-bus"; + clocks = <&clock CLK_DOUT_ACLK300_GSCL>; + clock-names = "bus"; + status = "disabled"; + }; + + bus_jpeg: bus-jpeg { + compatible = "samsung,exynos-bus"; + clocks = <&clock CLK_DOUT_ACLK300_JPEG>; + clock-names = "bus"; + status = "disabled"; + }; + + bus_jpeg_apb: bus-jpeg-apb { + compatible = "samsung,exynos-bus"; + clocks = <&clock CLK_DOUT_ACLK166>; + clock-names = "bus"; + status = "disabled"; + }; + + bus_mfc: bus-mfc { + compatible = "samsung,exynos-bus"; + clocks = <&clock CLK_DOUT_ACLK333>; + clock-names = "bus"; + status = "disabled"; + }; + + bus_mscl: bus-mscl { + compatible = "samsung,exynos-bus"; + clocks = <&clock CLK_DOUT_ACLK400_MSCL>; + clock-names = "bus"; + status = "disabled"; + }; + + bus_noc: bus-noc { + compatible = "samsung,exynos-bus"; + clocks = <&clock CLK_DOUT_ACLK100_NOC>; + clock-names = "bus"; + status = "disabled"; + }; + + bus_peri: bus-peri { + compatible = "samsung,exynos-bus"; + clocks = <&clock CLK_DOUT_ACLK66>; + clock-names = "bus"; + status = "disabled"; + }; + + bus_wcore: bus-wcore { + compatible = "samsung,exynos-bus"; + clocks = <&clock CLK_DOUT_ACLK400_WCORE>; + clock-names = "bus"; + status = "disabled"; + }; + /* * The 'cpus' node is not present here but instead it is provided * by exynos5420-cpus.dtsi or exynos5422-cpus.dtsi. @@ -1066,118 +1177,6 @@ sysmmu_fimd1_1: sysmmu@14680000 { power-domains = <&disp_pd>; #iommu-cells = <0>; }; - - bus_wcore: bus-wcore { - compatible = "samsung,exynos-bus"; - clocks = <&clock CLK_DOUT_ACLK400_WCORE>; - clock-names = "bus"; - status = "disabled"; - }; - - bus_noc: bus-noc { - compatible = "samsung,exynos-bus"; - clocks = <&clock CLK_DOUT_ACLK100_NOC>; - clock-names = "bus"; - status = "disabled"; - }; - - bus_fsys_apb: bus-fsys-apb { - compatible = "samsung,exynos-bus"; - clocks = <&clock CLK_DOUT_PCLK200_FSYS>; - clock-names = "bus"; - status = "disabled"; - }; - - bus_fsys: bus-fsys { - compatible = "samsung,exynos-bus"; - clocks = <&clock CLK_DOUT_ACLK200_FSYS>; - clock-names = "bus"; - status = "disabled"; - }; - - bus_fsys2: bus-fsys2 { - compatible = "samsung,exynos-bus"; - clocks = <&clock CLK_DOUT_ACLK200_FSYS2>; - clock-names = "bus"; - status = "disabled"; - }; - - bus_mfc: bus-mfc { - compatible = "samsung,exynos-bus"; - clocks = <&clock CLK_DOUT_ACLK333>; - clock-names = "bus"; - status = "disabled"; - }; - - bus_gen: bus-gen { - compatible = "samsung,exynos-bus"; - clocks = <&clock CLK_DOUT_ACLK266>; - clock-names = "bus"; - status = "disabled"; - }; - - bus_peri: bus-peri { - compatible = "samsung,exynos-bus"; - clocks = <&clock CLK_DOUT_ACLK66>; - clock-names = "bus"; - status = "disabled"; - }; - - bus_g2d: bus-g2d { - compatible = "samsung,exynos-bus"; - clocks = <&clock CLK_DOUT_ACLK333_G2D>; - clock-names = "bus"; - status = "disabled"; - }; - - bus_g2d_acp: bus-g2d-acp { - compatible = "samsung,exynos-bus"; - clocks = <&clock CLK_DOUT_ACLK266_G2D>; - clock-names = "bus"; - status = "disabled"; - }; - - bus_jpeg: bus-jpeg { - compatible = "samsung,exynos-bus"; - clocks = <&clock CLK_DOUT_ACLK300_JPEG>; - clock-names = "bus"; - status = "disabled"; - }; - - bus_jpeg_apb: bus-jpeg-apb { - compatible = "samsung,exynos-bus"; - clocks = <&clock CLK_DOUT_ACLK166>; - clock-names = "bus"; - status = "disabled"; - }; - - bus_disp1_fimd: bus-disp1-fimd { - compatible = "samsung,exynos-bus"; - clocks = <&clock CLK_DOUT_ACLK300_DISP1>; - clock-names = "bus"; - status = "disabled"; - }; - - bus_disp1: bus-disp1 { - compatible = "samsung,exynos-bus"; - clocks = <&clock CLK_DOUT_ACLK400_DISP1>; - clock-names = "bus"; - status = "disabled"; - }; - - bus_gscl_scaler: bus-gscl-scaler { - compatible = "samsung,exynos-bus"; - clocks = <&clock CLK_DOUT_ACLK300_GSCL>; - clock-names = "bus"; - status = "disabled"; - }; - - bus_mscl: bus-mscl { - compatible = "samsung,exynos-bus"; - clocks = <&clock CLK_DOUT_ACLK400_MSCL>; - clock-names = "bus"; - status = "disabled"; - }; }; thermal-zones {
The soc node is supposed to have only device nodes with MMIO addresses, as reported by dtc W=1: arch/arm/boot/dts/exynos5420.dtsi:1070.24-1075.5: Warning (simple_bus_reg): /soc/bus-wcore: missing or empty reg/ranges property and dtbs_check: exynos5420-arndale-octa.dtb: soc: bus-wcore: {'compatible': ['samsung,exynos-bus'], 'clocks': [[2, 769]], 'clock-names': ['bus'], 'status': ['disabled']} should not be valid under {'type': 'object'} Move the bus nodes and their OPP tables out of SoC to fix this. Re-order them alphabetically while moving and put some of the OPP tables in device nodes (if they are not shared). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> --- arch/arm/boot/dts/exynos5420.dtsi | 223 +++++++++++++++--------------- 1 file changed, 111 insertions(+), 112 deletions(-)