| Message ID | 20230808082738.122804-9-krzysztof.kozlowski@linaro.org (mailing list archive) |
|---|---|
| State | Accepted |
| Headers | show |
| Series | clk: samsung: remove number of clocks from bindings | expand |
> -----Original Message----- > From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > Sent: Tuesday, August 8, 2023 1:58 PM > To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>; Sylwester > Nawrocki <s.nawrocki@samsung.com>; Tomasz Figa > <tomasz.figa@gmail.com>; Chanwoo Choi <cw00.choi@samsung.com>; Alim > Akhtar <alim.akhtar@samsung.com>; Michael Turquette > <mturquette@baylibre.com>; Stephen Boyd <sboyd@kernel.org>; Rob > Herring <robh+dt@kernel.org>; Conor Dooley <conor+dt@kernel.org>; > linux-samsung-soc@vger.kernel.org; linux-clk@vger.kernel.org; linux-arm- > kernel@lists.infradead.org; linux-kernel@vger.kernel.org; > devicetree@vger.kernel.org > Subject: [PATCH 08/11] clk: samsung: exynos7885: do not define number of > clocks in bindings > > Number of clocks supported by Linux drivers might vary - sometimes we add > new clocks, not exposed previously. Therefore this number of clocks should > not be in the bindings, because otherwise we should not change it. > > Define number of clocks per each clock controller inside the driver directly. > > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > --- Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> > drivers/clk/samsung/clk-exynos7885.c | 14 ++++++++++---- > 1 file changed, 10 insertions(+), 4 deletions(-) > > diff --git a/drivers/clk/samsung/clk-exynos7885.c b/drivers/clk/samsung/clk- > exynos7885.c > index 0c6a84764f7a..f7d7427a558b 100644 > --- a/drivers/clk/samsung/clk-exynos7885.c > +++ b/drivers/clk/samsung/clk-exynos7885.c > @@ -16,6 +16,12 @@ > #include "clk.h" > #include "clk-exynos-arm64.h" > > +/* NOTE: Must be equal to the last clock ID increased by one */ > +#define CLKS_NR_TOP (CLK_GOUT_FSYS_USB30DRD > + 1) > +#define CLKS_NR_CORE > (CLK_GOUT_TREX_P_CORE_PCLK_P_CORE + 1) > +#define CLKS_NR_PERI (CLK_GOUT_WDT1_PCLK + 1) > +#define CLKS_NR_FSYS > (CLK_GOUT_MMC_SDIO_SDCLKIN + 1) > + > /* ---- CMU_TOP ------------------------------------------------------------- */ > > /* Register Offset definitions for CMU_TOP (0x12060000) */ @@ -333,7 > +339,7 @@ static const struct samsung_cmu_info top_cmu_info __initconst > = { > .nr_div_clks = ARRAY_SIZE(top_div_clks), > .gate_clks = top_gate_clks, > .nr_gate_clks = ARRAY_SIZE(top_gate_clks), > - .nr_clk_ids = TOP_NR_CLK, > + .nr_clk_ids = CLKS_NR_TOP, > .clk_regs = top_clk_regs, > .nr_clk_regs = ARRAY_SIZE(top_clk_regs), > }; > @@ -552,7 +558,7 @@ static const struct samsung_cmu_info peri_cmu_info > __initconst = { > .nr_mux_clks = ARRAY_SIZE(peri_mux_clks), > .gate_clks = peri_gate_clks, > .nr_gate_clks = ARRAY_SIZE(peri_gate_clks), > - .nr_clk_ids = PERI_NR_CLK, > + .nr_clk_ids = CLKS_NR_PERI, > .clk_regs = peri_clk_regs, > .nr_clk_regs = ARRAY_SIZE(peri_clk_regs), > .clk_name = "dout_peri_bus", > @@ -661,7 +667,7 @@ static const struct samsung_cmu_info core_cmu_info > __initconst = { > .nr_div_clks = ARRAY_SIZE(core_div_clks), > .gate_clks = core_gate_clks, > .nr_gate_clks = ARRAY_SIZE(core_gate_clks), > - .nr_clk_ids = CORE_NR_CLK, > + .nr_clk_ids = CLKS_NR_CORE, > .clk_regs = core_clk_regs, > .nr_clk_regs = ARRAY_SIZE(core_clk_regs), > .clk_name = "dout_core_bus", > @@ -743,7 +749,7 @@ static const struct samsung_cmu_info fsys_cmu_info > __initconst = { > .nr_mux_clks = ARRAY_SIZE(fsys_mux_clks), > .gate_clks = fsys_gate_clks, > .nr_gate_clks = ARRAY_SIZE(fsys_gate_clks), > - .nr_clk_ids = FSYS_NR_CLK, > + .nr_clk_ids = CLKS_NR_FSYS, > .clk_regs = fsys_clk_regs, > .nr_clk_regs = ARRAY_SIZE(fsys_clk_regs), > .clk_name = "dout_fsys_bus", > -- > 2.34.1
diff --git a/drivers/clk/samsung/clk-exynos7885.c b/drivers/clk/samsung/clk-exynos7885.c index 0c6a84764f7a..f7d7427a558b 100644 --- a/drivers/clk/samsung/clk-exynos7885.c +++ b/drivers/clk/samsung/clk-exynos7885.c @@ -16,6 +16,12 @@ #include "clk.h" #include "clk-exynos-arm64.h" +/* NOTE: Must be equal to the last clock ID increased by one */ +#define CLKS_NR_TOP (CLK_GOUT_FSYS_USB30DRD + 1) +#define CLKS_NR_CORE (CLK_GOUT_TREX_P_CORE_PCLK_P_CORE + 1) +#define CLKS_NR_PERI (CLK_GOUT_WDT1_PCLK + 1) +#define CLKS_NR_FSYS (CLK_GOUT_MMC_SDIO_SDCLKIN + 1) + /* ---- CMU_TOP ------------------------------------------------------------- */ /* Register Offset definitions for CMU_TOP (0x12060000) */ @@ -333,7 +339,7 @@ static const struct samsung_cmu_info top_cmu_info __initconst = { .nr_div_clks = ARRAY_SIZE(top_div_clks), .gate_clks = top_gate_clks, .nr_gate_clks = ARRAY_SIZE(top_gate_clks), - .nr_clk_ids = TOP_NR_CLK, + .nr_clk_ids = CLKS_NR_TOP, .clk_regs = top_clk_regs, .nr_clk_regs = ARRAY_SIZE(top_clk_regs), }; @@ -552,7 +558,7 @@ static const struct samsung_cmu_info peri_cmu_info __initconst = { .nr_mux_clks = ARRAY_SIZE(peri_mux_clks), .gate_clks = peri_gate_clks, .nr_gate_clks = ARRAY_SIZE(peri_gate_clks), - .nr_clk_ids = PERI_NR_CLK, + .nr_clk_ids = CLKS_NR_PERI, .clk_regs = peri_clk_regs, .nr_clk_regs = ARRAY_SIZE(peri_clk_regs), .clk_name = "dout_peri_bus", @@ -661,7 +667,7 @@ static const struct samsung_cmu_info core_cmu_info __initconst = { .nr_div_clks = ARRAY_SIZE(core_div_clks), .gate_clks = core_gate_clks, .nr_gate_clks = ARRAY_SIZE(core_gate_clks), - .nr_clk_ids = CORE_NR_CLK, + .nr_clk_ids = CLKS_NR_CORE, .clk_regs = core_clk_regs, .nr_clk_regs = ARRAY_SIZE(core_clk_regs), .clk_name = "dout_core_bus", @@ -743,7 +749,7 @@ static const struct samsung_cmu_info fsys_cmu_info __initconst = { .nr_mux_clks = ARRAY_SIZE(fsys_mux_clks), .gate_clks = fsys_gate_clks, .nr_gate_clks = ARRAY_SIZE(fsys_gate_clks), - .nr_clk_ids = FSYS_NR_CLK, + .nr_clk_ids = CLKS_NR_FSYS, .clk_regs = fsys_clk_regs, .nr_clk_regs = ARRAY_SIZE(fsys_clk_regs), .clk_name = "dout_fsys_bus",
Number of clocks supported by Linux drivers might vary - sometimes we add new clocks, not exposed previously. Therefore this number of clocks should not be in the bindings, because otherwise we should not change it. Define number of clocks per each clock controller inside the driver directly. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> --- drivers/clk/samsung/clk-exynos7885.c | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-)