| Message ID | 20230814112539.70453-4-sriranjani.p@samsung.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | [v3,1/4] dt-bindings: net: Add FSD EQoS device tree bindings | expand |
On 14/08/2023 13:25, Sriranjani P wrote: > The FSD SoC contains two instances of Synopsys DWC QoS Ethernet IP, one > in FSYS0 block and other in PERIC block. ... > > cpus { > @@ -984,6 +985,27 @@ > clocks = <&clock_fsys0 UFS0_MPHY_REFCLK_IXTAL26>; > clock-names = "ref_clk"; > }; > + > + ethernet_0: ethernet@15300000 { > + compatible = "tesla,dwc-qos-ethernet-4.21"; The requirement for entire Samsung and its flavors is to pass dtbs_check. Since some months. Does it pass? Best regards, Krzysztof
On 14/08/2023 13:25, Sriranjani P wrote: > The FSD SoC contains two instances of Synopsys DWC QoS Ethernet IP, one > in FSYS0 block and other in PERIC block. > > Adds device tree node for Ethernet in FSYS0 Block and enables the same for > FSD platform. > ... > &pinctrl_peric { > diff --git a/arch/arm64/boot/dts/tesla/fsd.dtsi b/arch/arm64/boot/dts/tesla/fsd.dtsi > index 1c53c68efd53..9a991f021711 100644 > --- a/arch/arm64/boot/dts/tesla/fsd.dtsi > +++ b/arch/arm64/boot/dts/tesla/fsd.dtsi > @@ -32,6 +32,7 @@ > spi0 = &spi_0; > spi1 = &spi_1; > spi2 = &spi_2; > + eth0 = ðernet_0; One more thing - I said it two times already. Patch v1 and then in v2. You responded now without waiting for my further feedback and immediately sent the same stuff. Let's be clear: NAK for the reasons I said multiple times. Best regards, Krzysztof
> +ðernet_0 { > + status = "okay"; > + > + fixed-link { > + speed = <1000>; > + full-duplex; > + }; > +}; A fixed link on its own is pretty unusual. Normally it is combined with an Ethernet switch. What is the link peer here? Andrew
> diff --git a/arch/arm64/boot/dts/tesla/fsd.dtsi b/arch/arm64/boot/dts/tesla/fsd.dtsi > index 1c53c68efd53..9a991f021711 100644 > --- a/arch/arm64/boot/dts/tesla/fsd.dtsi > +++ b/arch/arm64/boot/dts/tesla/fsd.dtsi > @@ -32,6 +32,7 @@ > spi0 = &spi_0; > spi1 = &spi_1; > spi2 = &spi_2; > + eth0 = ðernet_0; > }; > > cpus { > @@ -984,6 +985,27 @@ > clocks = <&clock_fsys0 UFS0_MPHY_REFCLK_IXTAL26>; > clock-names = "ref_clk"; > }; > + > + ethernet_0: ethernet@15300000 { > + compatible = "tesla,dwc-qos-ethernet-4.21"; > + reg = <0x0 0x15300000 0x0 0x10000>; > + interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&clock_fsys0 FSYS0_EQOS_TOP0_IPCLKPORT_CLK_PTP_REF_I>, > + <&clock_fsys0 FSYS0_EQOS_TOP0_IPCLKPORT_ACLK_I>, > + <&clock_fsys0 FSYS0_EQOS_TOP0_IPCLKPORT_HCLK_I>, > + <&clock_fsys0 FSYS0_EQOS_TOP0_IPCLKPORT_RGMII_CLK_I>, > + <&clock_fsys0 FSYS0_EQOS_TOP0_IPCLKPORT_CLK_RX_I>; > + clock-names = "ptp_ref", "master_bus", "slave_bus", "tx", "rx"; > + pinctrl-names = "default"; > + pinctrl-0 = <ð0_tx_clk>, <ð0_tx_data>, <ð0_tx_ctrl>, > + <ð0_phy_intr>, <ð0_rx_clk>, <ð0_rx_data>, > + <ð0_rx_ctrl>, <ð0_mdio>; > + local-mac-address = [00 00 00 00 00 00]; > + fsd-rx-clock-skew = <&sysreg_fsys0 0x0>; > + iommus = <&smmu_fsys0 0x0 0x1>; > + phy-mode = "rgmii"; What is inserting the RGMII delays? Andrew
> -----Original Message----- > From: Krzysztof Kozlowski [mailto:krzysztof.kozlowski@linaro.org] > Sent: 15 August 2023 01:27 > To: Sriranjani P <sriranjani.p@samsung.com>; davem@davemloft.net; > edumazet@google.com; kuba@kernel.org; pabeni@redhat.com; > robh+dt@kernel.org; krzysztof.kozlowski+dt@linaro.org; > conor+dt@kernel.org; richardcochran@gmail.com; > alexandre.torgue@foss.st.com; joabreu@synopsys.com; > mcoquelin.stm32@gmail.com; alim.akhtar@samsung.com; linux- > fsd@tesla.com; pankaj.dubey@samsung.com; swathi.ks@samsung.com; > ravi.patel@samsung.com > Cc: netdev@vger.kernel.org; devicetree@vger.kernel.org; linux- > kernel@vger.kernel.org; linux-samsung-soc@vger.kernel.org; linux-arm- > kernel@lists.infradead.org; Jayati Sahu <jayati.sahu@samsung.com> > Subject: Re: [PATCH v3 3/4] arm64: dts: fsd: Add Ethernet support for FSYS0 > Block of FSD SoC > > On 14/08/2023 13:25, Sriranjani P wrote: > > The FSD SoC contains two instances of Synopsys DWC QoS Ethernet IP, > > one in FSYS0 block and other in PERIC block. > > > > Adds device tree node for Ethernet in FSYS0 Block and enables the same > > for FSD platform. > > > > ... > > > &pinctrl_peric { > > diff --git a/arch/arm64/boot/dts/tesla/fsd.dtsi > > b/arch/arm64/boot/dts/tesla/fsd.dtsi > > index 1c53c68efd53..9a991f021711 100644 > > --- a/arch/arm64/boot/dts/tesla/fsd.dtsi > > +++ b/arch/arm64/boot/dts/tesla/fsd.dtsi > > @@ -32,6 +32,7 @@ > > spi0 = &spi_0; > > spi1 = &spi_1; > > spi2 = &spi_2; > > + eth0 = ðernet_0; > > One more thing - I said it two times already. Patch v1 and then in v2. > You responded now without waiting for my further feedback and > immediately sent the same stuff. > > Let's be clear: > > NAK for the reasons I said multiple times. Got it, will move this alias in board specific dts file. > > Best regards, > Krzysztof
> -----Original Message----- > From: Andrew Lunn [mailto:andrew@lunn.ch] > Sent: 15 August 2023 02:20 > To: Sriranjani P <sriranjani.p@samsung.com> > Cc: davem@davemloft.net; edumazet@google.com; kuba@kernel.org; > pabeni@redhat.com; robh+dt@kernel.org; > krzysztof.kozlowski+dt@linaro.org; conor+dt@kernel.org; > richardcochran@gmail.com; alexandre.torgue@foss.st.com; > joabreu@synopsys.com; mcoquelin.stm32@gmail.com; > alim.akhtar@samsung.com; linux-fsd@tesla.com; > pankaj.dubey@samsung.com; swathi.ks@samsung.com; > ravi.patel@samsung.com; netdev@vger.kernel.org; > devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; linux-samsung- > soc@vger.kernel.org; linux-arm-kernel@lists.infradead.org; Jayati Sahu > <jayati.sahu@samsung.com> > Subject: Re: [PATCH v3 3/4] arm64: dts: fsd: Add Ethernet support for FSYS0 > Block of FSD SoC > > > +ðernet_0 { > > + status = "okay"; > > + > > + fixed-link { > > + speed = <1000>; > > + full-duplex; > > + }; > > +}; > > A fixed link on its own is pretty unusual. Normally it is combined with an > Ethernet switch. What is the link peer here? It is a direct connection to the Ethernet switch managed by an external management unit. > > Andrew Regards, Swathi
> > > +ðernet_0 { > > > + status = "okay"; > > > + > > > + fixed-link { > > > + speed = <1000>; > > > + full-duplex; > > > + }; > > > +}; > > > > A fixed link on its own is pretty unusual. Normally it is combined with an > > Ethernet switch. What is the link peer here? > > It is a direct connection to the Ethernet switch managed by an external > management unit. Ah, interesting. This is the third example of this in about a month. Take a look at the Realtek and TI work in this area. So, i will ask the same questions i put to Realtek and TI. Does Linux know about the switch in any way? Can it manage the switch, other than SNMP, HTTP from user space? Does it know about the state of the ports, etc? If you say this is just a colocated management switch, which Linux is not managing in any way, that is O.K. If you have Linux involved in some way, please join the discussion with TI about adding a new model for semi-autonomous switches. Andrew
> -----Original Message----- > From: Andrew Lunn <andrew@lunn.ch> > Sent: 06 June 2024 18:53 > To: Swathi K S <swathi.ks@samsung.com> > Cc: davem@davemloft.net; edumazet@google.com; kuba@kernel.org; > pabeni@redhat.com; robh+dt@kernel.org; krzysztof.kozlowski+dt@linaro.org; > conor+dt@kernel.org; richardcochran@gmail.com; > alexandre.torgue@foss.st.com; joabreu@synopsys.com; > mcoquelin.stm32@gmail.com; alim.akhtar@samsung.com; linux- > fsd@tesla.com; pankaj.dubey@samsung.com; ravi.patel@samsung.com; > netdev@vger.kernel.org; devicetree@vger.kernel.org; linux- > kernel@vger.kernel.org; linux-samsung-soc@vger.kernel.org; linux-arm- > kernel@lists.infradead.org; 'Jayati Sahu' <jayati.sahu@samsung.com>; Siddharth > Vadapalli <s-vadapalli@ti.com> > Subject: Re: [PATCH v3 3/4] arm64: dts: fsd: Add Ethernet support for FSYS0 > Block of FSD SoC > > > > > +ðernet_0 { > > > > + status = "okay"; > > > > + > > > > + fixed-link { > > > > + speed = <1000>; > > > > + full-duplex; > > > > + }; > > > > +}; > > > > > > A fixed link on its own is pretty unusual. Normally it is combined > > > with an Ethernet switch. What is the link peer here? > > > > It is a direct connection to the Ethernet switch managed by an > > external management unit. > > Ah, interesting. This is the third example of this in about a month. Take a look at > the Realtek and TI work in this area. > > So, i will ask the same questions i put to Realtek and TI. Does Linux know about > the switch in any way? Can it manage the switch, other than SNMP, HTTP from > user space? Does it know about the state of the ports, etc? > > If you say this is just a colocated management switch, which Linux is not > managing in any way, that is O.K. If you have Linux involved in some way, please > join the discussion with TI about adding a new model for semi-autonomous > switches. Thanks for letting us know about the ongoing discussion. But in this case, the switch is not managed by Linux. > > Andrew Thanks, Swathi
diff --git a/arch/arm64/boot/dts/tesla/fsd-evb.dts b/arch/arm64/boot/dts/tesla/fsd-evb.dts index 8d7794642900..2c37097c709a 100644 --- a/arch/arm64/boot/dts/tesla/fsd-evb.dts +++ b/arch/arm64/boot/dts/tesla/fsd-evb.dts @@ -64,6 +64,15 @@ }; }; +ðernet_0 { + status = "okay"; + + fixed-link { + speed = <1000>; + full-duplex; + }; +}; + &fin_pll { clock-frequency = <24000000>; }; diff --git a/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi b/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi index 3f898cf4874c..cb437483ff6e 100644 --- a/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi +++ b/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi @@ -64,6 +64,62 @@ samsung,pin-pud = <FSD_PIN_PULL_UP>; samsung,pin-drv = <FSD_PIN_DRV_LV4>; }; + + eth0_tx_clk: eth0-tx-clk-pins { + samsung,pins = "gpf0-0"; + samsung,pin-function = <FSD_PIN_FUNC_2>; + samsung,pin-pud = <FSD_PIN_PULL_DOWN>; + samsung,pin-drv = <FSD_PIN_DRV_LV6>; + }; + + eth0_tx_data: eth0-tx-data-pins { + samsung,pins = "gpf0-1", "gpf0-2", "gpf0-3", "gpf0-4"; + samsung,pin-function = <FSD_PIN_FUNC_2>; + samsung,pin-pud = <FSD_PIN_PULL_UP>; + samsung,pin-drv = <FSD_PIN_DRV_LV6>; + }; + + eth0_tx_ctrl: eth0-tx-ctrl-pins { + samsung,pins = "gpf0-5"; + samsung,pin-function = <FSD_PIN_FUNC_2>; + samsung,pin-pud = <FSD_PIN_PULL_UP>; + samsung,pin-drv = <FSD_PIN_DRV_LV6>; + }; + + eth0_phy_intr: eth0-phy-intr-pins { + samsung,pins = "gpf0-6"; + samsung,pin-function = <FSD_PIN_FUNC_2>; + samsung,pin-pud = <FSD_PIN_PULL_NONE>; + samsung,pin-drv = <FSD_PIN_DRV_LV4>; + }; + + eth0_rx_clk: eth0-rx-clk-pins { + samsung,pins = "gpf1-0"; + samsung,pin-function = <FSD_PIN_FUNC_2>; + samsung,pin-pud = <FSD_PIN_PULL_UP>; + samsung,pin-drv = <FSD_PIN_DRV_LV6>; + }; + + eth0_rx_data: eth0-rx-data-pins { + samsung,pins = "gpf1-1", "gpf1-2", "gpf1-3", "gpf1-4"; + samsung,pin-function = <FSD_PIN_FUNC_2>; + samsung,pin-pud = <FSD_PIN_PULL_UP>; + samsung,pin-drv = <FSD_PIN_DRV_LV6>; + }; + + eth0_rx_ctrl: eth0-rx-ctrl-pins { + samsung,pins = "gpf1-5"; + samsung,pin-function = <FSD_PIN_FUNC_2>; + samsung,pin-pud = <FSD_PIN_PULL_UP>; + samsung,pin-drv = <FSD_PIN_DRV_LV6>; + }; + + eth0_mdio: eth0-mdio-pins { + samsung,pins = "gpf1-6", "gpf1-7"; + samsung,pin-function = <FSD_PIN_FUNC_2>; + samsung,pin-pud = <FSD_PIN_PULL_NONE>; + samsung,pin-drv = <FSD_PIN_DRV_LV4>; + }; }; &pinctrl_peric { diff --git a/arch/arm64/boot/dts/tesla/fsd.dtsi b/arch/arm64/boot/dts/tesla/fsd.dtsi index 1c53c68efd53..9a991f021711 100644 --- a/arch/arm64/boot/dts/tesla/fsd.dtsi +++ b/arch/arm64/boot/dts/tesla/fsd.dtsi @@ -32,6 +32,7 @@ spi0 = &spi_0; spi1 = &spi_1; spi2 = &spi_2; + eth0 = ðernet_0; }; cpus { @@ -984,6 +985,27 @@ clocks = <&clock_fsys0 UFS0_MPHY_REFCLK_IXTAL26>; clock-names = "ref_clk"; }; + + ethernet_0: ethernet@15300000 { + compatible = "tesla,dwc-qos-ethernet-4.21"; + reg = <0x0 0x15300000 0x0 0x10000>; + interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clock_fsys0 FSYS0_EQOS_TOP0_IPCLKPORT_CLK_PTP_REF_I>, + <&clock_fsys0 FSYS0_EQOS_TOP0_IPCLKPORT_ACLK_I>, + <&clock_fsys0 FSYS0_EQOS_TOP0_IPCLKPORT_HCLK_I>, + <&clock_fsys0 FSYS0_EQOS_TOP0_IPCLKPORT_RGMII_CLK_I>, + <&clock_fsys0 FSYS0_EQOS_TOP0_IPCLKPORT_CLK_RX_I>; + clock-names = "ptp_ref", "master_bus", "slave_bus", "tx", "rx"; + pinctrl-names = "default"; + pinctrl-0 = <ð0_tx_clk>, <ð0_tx_data>, <ð0_tx_ctrl>, + <ð0_phy_intr>, <ð0_rx_clk>, <ð0_rx_data>, + <ð0_rx_ctrl>, <ð0_mdio>; + local-mac-address = [00 00 00 00 00 00]; + fsd-rx-clock-skew = <&sysreg_fsys0 0x0>; + iommus = <&smmu_fsys0 0x0 0x1>; + phy-mode = "rgmii"; + status = "disabled"; + }; }; };