| Message ID | 20240127001926.495769-6-andre.draszik@linaro.org (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | [1/9] clk: samsung: gs-101: drop extra empty line | expand |
On Fri, Jan 26, 2024 at 6:19 PM André Draszik <andre.draszik@linaro.org> wrote: > > On the gs101-oriole board, i2c bus 12 has various USB-related > controllers attached to it. > > Note the selection of the USI protocol is intentionally left for the > board dts file. > > Signed-off-by: André Draszik <andre.draszik@linaro.org> > --- > arch/arm64/boot/dts/exynos/google/gs101.dtsi | 30 ++++++++++++++++++++ > 1 file changed, 30 insertions(+) > > diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi > index 5088c81fd6aa..d66590fa922f 100644 > --- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi > +++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi > @@ -450,6 +450,36 @@ pinctrl_peric1: pinctrl@10c40000 { > interrupts = <GIC_SPI 644 IRQ_TYPE_LEVEL_HIGH 0>; > }; > > + usi12: usi@10d500c0 { > + compatible = "google,gs101-usi", > + "samsung,exynos850-usi"; It doesn't fit on one line? > + reg = <0x10d500c0 0x20>; > + ranges; > + #address-cells = <1>; > + #size-cells = <1>; > + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_5>, > + <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_5>; > + clock-names = "pclk", "ipclk"; > + samsung,sysreg = <&sysreg_peric1 0x1010>; > + samsung,mode = <USI_V2_NONE>; > + status = "disabled"; > + > + hsi2c_12: i2c@10d50000 { > + compatible = "google,gs101-hsi2c", > + "samsung,exynosautov9-hsi2c"; > + reg = <0x10d50000 0xc0>; > + interrupts = <GIC_SPI 655 IRQ_TYPE_LEVEL_HIGH 0>; > + #address-cells = <1>; > + #size-cells = <0>; > + pinctrl-names = "default"; > + pinctrl-0 = <&hsi2c12_bus>; I remember Krzysztof asked me to put pinctrl-0 first in my recent patches. Not sure how important it is, just saying. Other than that, LGTM: Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> > + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_5>, > + <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_5>; > + clock-names = "hsi2c", "hsi2c_pclk"; > + status = "disabled"; > + }; > + }; > + > pinctrl_hsi1: pinctrl@11840000 { > compatible = "google,gs101-pinctrl"; > reg = <0x11840000 0x00001000>; > -- > 2.43.0.429.g432eaa2c6b-goog >
On Fri, 2024-01-26 at 20:55 -0600, Sam Protsenko wrote: > On Fri, Jan 26, 2024 at 6:19 PM André Draszik <andre.draszik@linaro.org> wrote: > > --- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi > > +++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi > > @@ -450,6 +450,36 @@ pinctrl_peric1: pinctrl@10c40000 { > > interrupts = <GIC_SPI 644 IRQ_TYPE_LEVEL_HIGH 0>; > > }; > > > > + usi12: usi@10d500c0 { > > + compatible = "google,gs101-usi", > > + "samsung,exynos850-usi"; > > It doesn't fit on one line? No, it's 81 characters. While I know it's not a hard rule in this case, there are other cases in this file where the line was split in the same way, so I followed that. > > + pinctrl-names = "default"; > > + pinctrl-0 = <&hsi2c12_bus>; > > I remember Krzysztof asked me to put pinctrl-0 first in my recent > patches. Not sure how important it is, just saying. Other than that, Makes sense, this came from a copy/paste and I have fixed it. Cheers, Andre'
diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi index 5088c81fd6aa..d66590fa922f 100644 --- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi +++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi @@ -450,6 +450,36 @@ pinctrl_peric1: pinctrl@10c40000 { interrupts = <GIC_SPI 644 IRQ_TYPE_LEVEL_HIGH 0>; }; + usi12: usi@10d500c0 { + compatible = "google,gs101-usi", + "samsung,exynos850-usi"; + reg = <0x10d500c0 0x20>; + ranges; + #address-cells = <1>; + #size-cells = <1>; + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_5>, + <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_5>; + clock-names = "pclk", "ipclk"; + samsung,sysreg = <&sysreg_peric1 0x1010>; + samsung,mode = <USI_V2_NONE>; + status = "disabled"; + + hsi2c_12: i2c@10d50000 { + compatible = "google,gs101-hsi2c", + "samsung,exynosautov9-hsi2c"; + reg = <0x10d50000 0xc0>; + interrupts = <GIC_SPI 655 IRQ_TYPE_LEVEL_HIGH 0>; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&hsi2c12_bus>; + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_5>, + <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_5>; + clock-names = "hsi2c", "hsi2c_pclk"; + status = "disabled"; + }; + }; + pinctrl_hsi1: pinctrl@11840000 { compatible = "google,gs101-pinctrl"; reg = <0x11840000 0x00001000>;
On the gs101-oriole board, i2c bus 12 has various USB-related controllers attached to it. Note the selection of the USI protocol is intentionally left for the board dts file. Signed-off-by: André Draszik <andre.draszik@linaro.org> --- arch/arm64/boot/dts/exynos/google/gs101.dtsi | 30 ++++++++++++++++++++ 1 file changed, 30 insertions(+)