| Message ID | 20240216140449.2564625-6-tudor.ambarus@linaro.org (mailing list archive) |
|---|---|
| State | Accepted |
| Headers | show |
| Series | ARM: dts: samsung: specify the SPI FIFO depth | expand |
On 16/02/2024 15:04, Tudor Ambarus wrote: > Up to now the SPI alias was used as an index into an array defined in > the SPI driver to determine the SPI FIFO depthj Drop the dependency on > the SPI alias and specify the SPI FIFO depth directly into the SPI node. > > The FIFO depth were determined based on the SPI aliases that are defined > in exynos5433-tm2-common.dtsi: > spi0 = &spi_0; > spi1 = &spi_1; > spi2 = &spi_2; > spi3 = &spi_3; > spi4 = &spi_4; > spi-s3c64xx.c driver defines the following fifo_lvl_mask for the > "samsung,exynos5433-spi" compatible: > .fifo_lvl_mask = { 0x1ff, 0x7f, 0x7f, 0x7f, 0x7f, 0x1ff}, > Thus spi{0, 4} were considered having 256 byte FIFO depths, and > spi{1, 2, 3} having 64 byte FIFO depths. Update device tree with these > FIFO depths. No functional change expected. > > Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> > --- > arch/arm64/boot/dts/exynos/exynos5433.dtsi | 5 +++++ This and next one has wrong subject prefix. I fixed it. Best regards, Krzysztof
On 3/25/24 11:13, Krzysztof Kozlowski wrote: >> arch/arm64/boot/dts/exynos/exynos5433.dtsi | 5 +++++ > This and next one has wrong subject prefix. I fixed it. ah, s/arm/arm64. Thank you!
diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi index 7fbbec04bff0..0b9053b9b2b5 100644 --- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi @@ -1468,6 +1468,7 @@ spi_0: spi@14d20000 { pinctrl-names = "default"; pinctrl-0 = <&spi0_bus>; num-cs = <1>; + fifo-depth = <256>; status = "disabled"; }; @@ -1487,6 +1488,7 @@ spi_1: spi@14d30000 { pinctrl-names = "default"; pinctrl-0 = <&spi1_bus>; num-cs = <1>; + fifo-depth = <64>; status = "disabled"; }; @@ -1506,6 +1508,7 @@ spi_2: spi@14d40000 { pinctrl-names = "default"; pinctrl-0 = <&spi2_bus>; num-cs = <1>; + fifo-depth = <64>; status = "disabled"; }; @@ -1525,6 +1528,7 @@ spi_3: spi@14d50000 { pinctrl-names = "default"; pinctrl-0 = <&spi3_bus>; num-cs = <1>; + fifo-depth = <64>; status = "disabled"; }; @@ -1544,6 +1548,7 @@ spi_4: spi@14d00000 { pinctrl-names = "default"; pinctrl-0 = <&spi4_bus>; num-cs = <1>; + fifo-depth = <64>; status = "disabled"; };
Up to now the SPI alias was used as an index into an array defined in the SPI driver to determine the SPI FIFO depthj Drop the dependency on the SPI alias and specify the SPI FIFO depth directly into the SPI node. The FIFO depth were determined based on the SPI aliases that are defined in exynos5433-tm2-common.dtsi: spi0 = &spi_0; spi1 = &spi_1; spi2 = &spi_2; spi3 = &spi_3; spi4 = &spi_4; spi-s3c64xx.c driver defines the following fifo_lvl_mask for the "samsung,exynos5433-spi" compatible: .fifo_lvl_mask = { 0x1ff, 0x7f, 0x7f, 0x7f, 0x7f, 0x1ff}, Thus spi{0, 4} were considered having 256 byte FIFO depths, and spi{1, 2, 3} having 64 byte FIFO depths. Update device tree with these FIFO depths. No functional change expected. Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> --- arch/arm64/boot/dts/exynos/exynos5433.dtsi | 5 +++++ 1 file changed, 5 insertions(+)