| Message ID | 20240618204523.9563-3-semen.protsenko@linaro.org (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | hwrng: exynos: Add support for Exynos850 | expand |
It was <2024-06-18 wto 15:45>, when Sam Protsenko wrote: > Fix obvious style issues. Some of those were found with checkpatch, and > some just contradict the kernel coding style guide. > > No functional change. > > Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> > Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > --- > Changes in v2: > - Added Krzysztof's R-b tag > > drivers/char/hw_random/exynos-trng.c | 61 +++++++++++++--------------- > 1 file changed, 29 insertions(+), 32 deletions(-) > Acked-by: Łukasz Stelmach <l.stelmach@samsung.com> > diff --git a/drivers/char/hw_random/exynos-trng.c b/drivers/char/hw_random/exynos-trng.c > index 0ed5d22fe667..88a5088ed34d 100644 > --- a/drivers/char/hw_random/exynos-trng.c > +++ b/drivers/char/hw_random/exynos-trng.c > @@ -23,45 +23,41 @@ > #include <linux/platform_device.h> > #include <linux/pm_runtime.h> > > -#define EXYNOS_TRNG_CLKDIV (0x0) > - > -#define EXYNOS_TRNG_CTRL (0x20) > -#define EXYNOS_TRNG_CTRL_RNGEN BIT(31) > - > -#define EXYNOS_TRNG_POST_CTRL (0x30) > -#define EXYNOS_TRNG_ONLINE_CTRL (0x40) > -#define EXYNOS_TRNG_ONLINE_STAT (0x44) > -#define EXYNOS_TRNG_ONLINE_MAXCHI2 (0x48) > -#define EXYNOS_TRNG_FIFO_CTRL (0x50) > -#define EXYNOS_TRNG_FIFO_0 (0x80) > -#define EXYNOS_TRNG_FIFO_1 (0x84) > -#define EXYNOS_TRNG_FIFO_2 (0x88) > -#define EXYNOS_TRNG_FIFO_3 (0x8c) > -#define EXYNOS_TRNG_FIFO_4 (0x90) > -#define EXYNOS_TRNG_FIFO_5 (0x94) > -#define EXYNOS_TRNG_FIFO_6 (0x98) > -#define EXYNOS_TRNG_FIFO_7 (0x9c) > -#define EXYNOS_TRNG_FIFO_LEN (8) > -#define EXYNOS_TRNG_CLOCK_RATE (500000) > - > +#define EXYNOS_TRNG_CLKDIV 0x0 > + > +#define EXYNOS_TRNG_CTRL 0x20 > +#define EXYNOS_TRNG_CTRL_RNGEN BIT(31) > + > +#define EXYNOS_TRNG_POST_CTRL 0x30 > +#define EXYNOS_TRNG_ONLINE_CTRL 0x40 > +#define EXYNOS_TRNG_ONLINE_STAT 0x44 > +#define EXYNOS_TRNG_ONLINE_MAXCHI2 0x48 > +#define EXYNOS_TRNG_FIFO_CTRL 0x50 > +#define EXYNOS_TRNG_FIFO_0 0x80 > +#define EXYNOS_TRNG_FIFO_1 0x84 > +#define EXYNOS_TRNG_FIFO_2 0x88 > +#define EXYNOS_TRNG_FIFO_3 0x8c > +#define EXYNOS_TRNG_FIFO_4 0x90 > +#define EXYNOS_TRNG_FIFO_5 0x94 > +#define EXYNOS_TRNG_FIFO_6 0x98 > +#define EXYNOS_TRNG_FIFO_7 0x9c > +#define EXYNOS_TRNG_FIFO_LEN 8 > +#define EXYNOS_TRNG_CLOCK_RATE 500000 > > struct exynos_trng_dev { > - struct device *dev; > - void __iomem *mem; > - struct clk *clk; > - struct hwrng rng; > + struct device *dev; > + void __iomem *mem; > + struct clk *clk; > + struct hwrng rng; > }; > > static int exynos_trng_do_read(struct hwrng *rng, void *data, size_t max, > bool wait) > { > - struct exynos_trng_dev *trng; > + struct exynos_trng_dev *trng = (struct exynos_trng_dev *)rng->priv; > int val; > > max = min_t(size_t, max, (EXYNOS_TRNG_FIFO_LEN * 4)); > - > - trng = (struct exynos_trng_dev *)rng->priv; > - > writel_relaxed(max * 8, trng->mem + EXYNOS_TRNG_FIFO_CTRL); > val = readl_poll_timeout(trng->mem + EXYNOS_TRNG_FIFO_CTRL, val, > val == 0, 200, 1000000); > @@ -122,7 +118,7 @@ static int exynos_trng_probe(struct platform_device *pdev) > > trng->rng.init = exynos_trng_init; > trng->rng.read = exynos_trng_do_read; > - trng->rng.priv = (unsigned long) trng; > + trng->rng.priv = (unsigned long)trng; > > platform_set_drvdata(pdev, trng); > trng->dev = &pdev->dev; > @@ -175,7 +171,7 @@ static int exynos_trng_probe(struct platform_device *pdev) > > static void exynos_trng_remove(struct platform_device *pdev) > { > - struct exynos_trng_dev *trng = platform_get_drvdata(pdev); > + struct exynos_trng_dev *trng = platform_get_drvdata(pdev); > > clk_disable_unprepare(trng->clk); > > @@ -204,7 +200,7 @@ static int exynos_trng_resume(struct device *dev) > } > > static DEFINE_SIMPLE_DEV_PM_OPS(exynos_trng_pm_ops, exynos_trng_suspend, > - exynos_trng_resume); > + exynos_trng_resume); > > static const struct of_device_id exynos_trng_dt_match[] = { > { > @@ -225,6 +221,7 @@ static struct platform_driver exynos_trng_driver = { > }; > > module_platform_driver(exynos_trng_driver); > + > MODULE_AUTHOR("Łukasz Stelmach"); > MODULE_DESCRIPTION("H/W TRNG driver for Exynos chips"); > MODULE_LICENSE("GPL v2");
diff --git a/drivers/char/hw_random/exynos-trng.c b/drivers/char/hw_random/exynos-trng.c index 0ed5d22fe667..88a5088ed34d 100644 --- a/drivers/char/hw_random/exynos-trng.c +++ b/drivers/char/hw_random/exynos-trng.c @@ -23,45 +23,41 @@ #include <linux/platform_device.h> #include <linux/pm_runtime.h> -#define EXYNOS_TRNG_CLKDIV (0x0) - -#define EXYNOS_TRNG_CTRL (0x20) -#define EXYNOS_TRNG_CTRL_RNGEN BIT(31) - -#define EXYNOS_TRNG_POST_CTRL (0x30) -#define EXYNOS_TRNG_ONLINE_CTRL (0x40) -#define EXYNOS_TRNG_ONLINE_STAT (0x44) -#define EXYNOS_TRNG_ONLINE_MAXCHI2 (0x48) -#define EXYNOS_TRNG_FIFO_CTRL (0x50) -#define EXYNOS_TRNG_FIFO_0 (0x80) -#define EXYNOS_TRNG_FIFO_1 (0x84) -#define EXYNOS_TRNG_FIFO_2 (0x88) -#define EXYNOS_TRNG_FIFO_3 (0x8c) -#define EXYNOS_TRNG_FIFO_4 (0x90) -#define EXYNOS_TRNG_FIFO_5 (0x94) -#define EXYNOS_TRNG_FIFO_6 (0x98) -#define EXYNOS_TRNG_FIFO_7 (0x9c) -#define EXYNOS_TRNG_FIFO_LEN (8) -#define EXYNOS_TRNG_CLOCK_RATE (500000) - +#define EXYNOS_TRNG_CLKDIV 0x0 + +#define EXYNOS_TRNG_CTRL 0x20 +#define EXYNOS_TRNG_CTRL_RNGEN BIT(31) + +#define EXYNOS_TRNG_POST_CTRL 0x30 +#define EXYNOS_TRNG_ONLINE_CTRL 0x40 +#define EXYNOS_TRNG_ONLINE_STAT 0x44 +#define EXYNOS_TRNG_ONLINE_MAXCHI2 0x48 +#define EXYNOS_TRNG_FIFO_CTRL 0x50 +#define EXYNOS_TRNG_FIFO_0 0x80 +#define EXYNOS_TRNG_FIFO_1 0x84 +#define EXYNOS_TRNG_FIFO_2 0x88 +#define EXYNOS_TRNG_FIFO_3 0x8c +#define EXYNOS_TRNG_FIFO_4 0x90 +#define EXYNOS_TRNG_FIFO_5 0x94 +#define EXYNOS_TRNG_FIFO_6 0x98 +#define EXYNOS_TRNG_FIFO_7 0x9c +#define EXYNOS_TRNG_FIFO_LEN 8 +#define EXYNOS_TRNG_CLOCK_RATE 500000 struct exynos_trng_dev { - struct device *dev; - void __iomem *mem; - struct clk *clk; - struct hwrng rng; + struct device *dev; + void __iomem *mem; + struct clk *clk; + struct hwrng rng; }; static int exynos_trng_do_read(struct hwrng *rng, void *data, size_t max, bool wait) { - struct exynos_trng_dev *trng; + struct exynos_trng_dev *trng = (struct exynos_trng_dev *)rng->priv; int val; max = min_t(size_t, max, (EXYNOS_TRNG_FIFO_LEN * 4)); - - trng = (struct exynos_trng_dev *)rng->priv; - writel_relaxed(max * 8, trng->mem + EXYNOS_TRNG_FIFO_CTRL); val = readl_poll_timeout(trng->mem + EXYNOS_TRNG_FIFO_CTRL, val, val == 0, 200, 1000000); @@ -122,7 +118,7 @@ static int exynos_trng_probe(struct platform_device *pdev) trng->rng.init = exynos_trng_init; trng->rng.read = exynos_trng_do_read; - trng->rng.priv = (unsigned long) trng; + trng->rng.priv = (unsigned long)trng; platform_set_drvdata(pdev, trng); trng->dev = &pdev->dev; @@ -175,7 +171,7 @@ static int exynos_trng_probe(struct platform_device *pdev) static void exynos_trng_remove(struct platform_device *pdev) { - struct exynos_trng_dev *trng = platform_get_drvdata(pdev); + struct exynos_trng_dev *trng = platform_get_drvdata(pdev); clk_disable_unprepare(trng->clk); @@ -204,7 +200,7 @@ static int exynos_trng_resume(struct device *dev) } static DEFINE_SIMPLE_DEV_PM_OPS(exynos_trng_pm_ops, exynos_trng_suspend, - exynos_trng_resume); + exynos_trng_resume); static const struct of_device_id exynos_trng_dt_match[] = { { @@ -225,6 +221,7 @@ static struct platform_driver exynos_trng_driver = { }; module_platform_driver(exynos_trng_driver); + MODULE_AUTHOR("Łukasz Stelmach"); MODULE_DESCRIPTION("H/W TRNG driver for Exynos chips"); MODULE_LICENSE("GPL v2");