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Fri, 16 Jun 2023 19:03:01 +0000 Received: from LV2PR12MB5869.namprd12.prod.outlook.com ([fe80::f7a7:a561:87e9:5fab]) by LV2PR12MB5869.namprd12.prod.outlook.com ([fe80::f7a7:a561:87e9:5fab%7]) with mapi id 15.20.6477.037; Fri, 16 Jun 2023 19:03:01 +0000 From: Jason Gunthorpe To: Andy Gross , Alim Akhtar , Bjorn Andersson , AngeloGioacchino Del Regno , Baolin Wang , Christophe Leroy , Gerald Schaefer , Heiko Stuebner , iommu@lists.linux.dev, Jernej Skrabec , Jonathan Hunter , Joerg Roedel , Kevin Tian , Konrad Dybcio , Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-s390@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-sunxi@lists.linux.dev, linux-tegra@vger.kernel.org, Russell King , linuxppc-dev@lists.ozlabs.org, Matthias Brugger , Matthew Rosato , Michael Ellerman , Nicholas Piggin , Orson Zhai , Rob Clark , Robin Murphy , Samuel Holland , Thierry Reding , Krishna Reddy , Chen-Yu Tsai , Will Deacon , Yong Wu , Chunyan Zhang Cc: Lu Baolu , Dmitry Osipenko , Marek Szyprowski , Nicolin Chen , Niklas Schnelle , Steven Price , Thierry Reding Subject: [PATCH v4 23/25] iommu: Add ops->domain_alloc_paging() Date: Fri, 16 Jun 2023 16:02:52 -0300 Message-Id: <23-v4-874277bde66e+1a9f6-iommu_all_defdom_jgg@nvidia.com> In-Reply-To: <0-v4-874277bde66e+1a9f6-iommu_all_defdom_jgg@nvidia.com> References: X-ClientProxiedBy: BLAPR03CA0072.namprd03.prod.outlook.com (2603:10b6:208:329::17) To LV2PR12MB5869.namprd12.prod.outlook.com (2603:10b6:408:176::16) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: LV2PR12MB5869:EE_|SJ1PR12MB6051:EE_ X-MS-Office365-Filtering-Correlation-Id: ecd79999-76aa-4c52-24b2-08db6e9c4b39 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: MW+Sm9XVB23zTEh36hHAByAmtaZli774ZADhXkDD4hjWuQPxYmFMg7AlJ/HHBIut/aRa8mbjzvYRa9sqSXci6Hz4WWSF6N4knZIFCqje+lfuQPNih5Sy8ldynzb99uJ3xesr/IakceNx6uANBE8Xq4SST1Sw3Gw94uUAzvBPhdn03HAc0XENPjAuydDf8Y53lfXaymSFDjgKIiQxW7XJTC7G2F96OLbdmXyjO88IrqVJNbHjEuMVjX2qGA9+SQ85UUYcLEMWLrk2o26f6c5h48aNMTvt8phTBNLe448uNcgZgbA2BJh6thXE7nEilTephKEQBKIGEDCiMrLcbqZs47YQeN6g8zgd3L7uIRMIQjmfmoRBUXYocriklIA3wgddIISgGcOEeuivwwlhKboL4a5o+YpVXQHnwG/w7HnNix978qy/IYgSCLzj3ZiSq5RYcE3MDdfsHBKydhWPi6fgu7VOsRvIZWMfhyIeUSua7V90+tb6FiWJq/3SnBruOS97v6FDBignWQWdtSSAxrh5utbmkXjddHtikpXp1z0hdspt2EsDF17b8k4OKE8y9LIm/29B9FDCCuoIPxQEiCLEFogCclQ0uCUBRgPL1ZCTfjNz2Gd2LO2WP/0hdgJa3sTp81p6/GHuNh7CvLq42ufeRKHlm1KGOSwyA1OFbCmfnA0I8TSui163jy607tk2/Cip/IFa9egCuKL+FLJ31TfcN6trafMOz91B4PlQrHoJNpSZB9nrN3uDLTTGYDCyt+oGpAHiyP1HSSV2VsrHcSlyWNQp6c4h+QBViIdJrWYfrMt88wiWLDunUiAhoasqLdgJZq9kENprxaRfZAdKDrqK/MBXf1MgH/LDTQwjN6kU0uCsFCcktPleR1Fviuy2Q72HytiZ5e29MYrw8Q7EP7Iw9qByBE9pBLYEB7lz0smmL8Jg66bmTjq0Wut6rd4vSoFdJXqIfv4Z8KasF67rpkDl3oh9kJjJ0jP543GLYpjjdkdE06EWHobsXQWyeKuR/QhkGn4JwP7/oM0MJuInaPdh3kbN75fJpPCokRMIYdf5VDF92a0KFl3yc6iAknzgVT/N1PLhcXlOdoT6oqini6TiWh8WQMQ0H2uQok42aJ8Sx/BKhCWXzXCa5cg7T45dlNmD7sP48ZAU7CoDjydBR0ZUdJn+klQpaTxUpbGEYvOJRd2CM6nc1I31k3FkdfChE54Hij1oh/qUpnZ3U6rhKcAQJR8ZV00tHc27638qmBJ7GDfgNPtgzlnRVbYVFnh5ftHHn1kqihiLM4rCLmtEf4rA2qoOYPjrkjrx1THyeWpHDVJWXiSBSbtDaE5zvEglrWsNB0FVGlIAvr2NzBhGgcBJ57Nai+HFr8jSS/3yq56pBq11fXLKvoILfehAI6PNMxqC+/OF0211s9GJgRNa2sJgU2AofS/gKDNE6JBkf1TlYI1rvDIfdfO3CcNIKYDoHA4Na+wIBVT3PUJiymHP6q17f5rouu7WsTkCz+AQ0x0NemwIjShap/Nxt7/FuQYapYqJwYFAeHy3vhZdMGsGFy01ouE6UBXalWvbcgsjOxUppdEr3q0mtOwRp9eHZXzNEZWn X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-Network-Message-Id: ecd79999-76aa-4c52-24b2-08db6e9c4b39 X-MS-Exchange-CrossTenant-AuthSource: LV2PR12MB5869.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 16 Jun 2023 19:02:56.0466 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: o2yZOfniEbWY4EkqeVWCiPu9RCjRVQ9tD8quy89d3NhVE1c86QryOHDqmb9+UJ44 X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ1PR12MB6051 Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org This callback requests the driver to create only a __IOMMU_DOMAIN_PAGING domain, so it saves a few lines in a lot of drivers needlessly checking the type. More critically, this allows us to sweep out all the IOMMU_DOMAIN_UNMANAGED and IOMMU_DOMAIN_DMA checks from a lot of the drivers, simplifying what is going on in the code and ultimately removing the now-unused special cases in drivers where they did not support IOMMU_DOMAIN_DMA. domain_alloc_paging() should return a struct iommu_domain that is functionally compatible with ARM_DMA_USE_IOMMU, dma-iommu.c and iommufd. Be forwards looking and pass in a 'struct device *' argument. We can provide this when allocating the default_domain. No drivers will look at this. Tested-by: Steven Price Tested-by: Marek Szyprowski Tested-by: Nicolin Chen Signed-off-by: Jason Gunthorpe --- drivers/iommu/iommu.c | 13 ++++++++++--- include/linux/iommu.h | 3 +++ 2 files changed, 13 insertions(+), 3 deletions(-) diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c index 0346c05e108438..8f3464ba204498 100644 --- a/drivers/iommu/iommu.c +++ b/drivers/iommu/iommu.c @@ -1985,6 +1985,7 @@ void iommu_set_fault_handler(struct iommu_domain *domain, EXPORT_SYMBOL_GPL(iommu_set_fault_handler); static struct iommu_domain *__iommu_domain_alloc(const struct iommu_ops *ops, + struct device *dev, unsigned int type) { struct iommu_domain *domain; @@ -1992,8 +1993,13 @@ static struct iommu_domain *__iommu_domain_alloc(const struct iommu_ops *ops, if (alloc_type == IOMMU_DOMAIN_IDENTITY && ops->identity_domain) return ops->identity_domain; + else if (type & __IOMMU_DOMAIN_PAGING && ops->domain_alloc_paging) { + domain = ops->domain_alloc_paging(dev); + } else if (ops->domain_alloc) + domain = ops->domain_alloc(alloc_type); + else + return NULL; - domain = ops->domain_alloc(alloc_type); if (!domain) return NULL; @@ -2024,14 +2030,15 @@ __iommu_group_domain_alloc(struct iommu_group *group, unsigned int type) lockdep_assert_held(&group->mutex); - return __iommu_domain_alloc(dev_iommu_ops(dev), type); + return __iommu_domain_alloc(dev_iommu_ops(dev), dev, type); } struct iommu_domain *iommu_domain_alloc(const struct bus_type *bus) { if (bus == NULL || bus->iommu_ops == NULL) return NULL; - return __iommu_domain_alloc(bus->iommu_ops, IOMMU_DOMAIN_UNMANAGED); + return __iommu_domain_alloc(bus->iommu_ops, NULL, + IOMMU_DOMAIN_UNMANAGED); } EXPORT_SYMBOL_GPL(iommu_domain_alloc); diff --git a/include/linux/iommu.h b/include/linux/iommu.h index 49331573f1d1f5..8e4d178c49c417 100644 --- a/include/linux/iommu.h +++ b/include/linux/iommu.h @@ -233,6 +233,8 @@ struct iommu_iotlb_gather { * struct iommu_ops - iommu ops and capabilities * @capable: check capability * @domain_alloc: allocate iommu domain + * @domain_alloc_paging: Allocate an iommu_domain that can be used for + * UNMANAGED, DMA, and DMA_FQ domain types. * @probe_device: Add device to iommu driver handling * @release_device: Remove device from iommu driver handling * @probe_finalize: Do final setup work after the device is added to an IOMMU @@ -264,6 +266,7 @@ struct iommu_ops { /* Domain allocation and freeing by the iommu driver */ struct iommu_domain *(*domain_alloc)(unsigned iommu_domain_type); + struct iommu_domain *(*domain_alloc_paging)(struct device *dev); struct iommu_device *(*probe_device)(struct device *dev); void (*release_device)(struct device *dev);