diff mbox series

[v2,3/4] arm64: dts: exynosautov9: add pdma0 device tree node

Message ID 6cccac5c12b58cb590269f19a19715f005d2087e.1656554759.git.chanho61.park@samsung.com (mailing list archive)
State Accepted
Commit 358ab0d11d8446a93efc9c79007e8513e8becc30
Headers show
Series [v2,1/4] dt-bindings: soc: samsung: usi: add exynosautov9-usi compatible | expand

Commit Message

Chanho Park June 30, 2022, 2:16 a.m. UTC 
Add an ARM pl330 dma controller DT node as pdma0.

Signed-off-by: Chanho Park <chanho61.park@samsung.com>
---
 arch/arm64/boot/dts/exynos/exynosautov9.dtsi | 10 ++++++++++
 1 file changed, 10 insertions(+)
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/exynos/exynosautov9.dtsi b/arch/arm64/boot/dts/exynos/exynosautov9.dtsi
index 00411d4c9c5a..c4cfa93e4c2e 100644
--- a/arch/arm64/boot/dts/exynos/exynosautov9.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynosautov9.dtsi
@@ -266,6 +266,16 @@  gic: interrupt-controller@10101000 {
 						 IRQ_TYPE_LEVEL_HIGH)>;
 		};
 
+		pdma0: dma-controller@1b2e0000 {
+			compatible = "arm,pl330", "arm,primecell";
+			reg = <0x1b2e0000 0x1000>;
+			interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cmu_busmc CLK_GOUT_BUSMC_PDMA0_PCLK>;
+			clock-names = "apb_pclk";
+			arm,pl330-broken-no-flushp;
+			#dma-cells = <1>;
+		};
+
 		pinctrl_alive: pinctrl@10450000 {
 			compatible = "samsung,exynosautov9-pinctrl";
 			reg = <0x10450000 0x1000>;