From patchwork Fri Jun 6 20:49:11 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Anderson X-Patchwork-Id: 4313531 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 773A59F170 for ; Fri, 6 Jun 2014 20:49:15 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 7B7EF2020F for ; Fri, 6 Jun 2014 20:49:14 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 76F7C201E7 for ; Fri, 6 Jun 2014 20:49:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752132AbaFFUtM (ORCPT ); Fri, 6 Jun 2014 16:49:12 -0400 Received: from mail-ve0-f179.google.com ([209.85.128.179]:55288 "EHLO mail-ve0-f179.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752102AbaFFUtM (ORCPT ); Fri, 6 Jun 2014 16:49:12 -0400 Received: by mail-ve0-f179.google.com with SMTP id oy12so3899819veb.24 for ; Fri, 06 Jun 2014 13:49:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type; bh=5SCRfqLTt4cxDu71aE6hZoTePiFYTQO5OUaxQ0n5jRA=; b=KwhSQTVzY0vQadSDy8Iw0W9orEcGe0IfnJCvY5UxnSV7HyuoBqiBEu3JSwPW0C5on+ ydKSDuy3zcf48fVYLHFd/5nXyeTXBGClBM/9tYE6k7AFelOCsVjkSkgIfPAFHUkDZ3mv IGNF853KrhUpSOdT5qb37YCnmGXiGUqZCJOO8YUdLw7KOS8orzKFQn7ao+wHEO85l4pp iLwy4VQVsjy5yx7Hgy8KSp5iW7ntMSyF127zqVq37F4YS2qsw7Ec/6+wq8rVhwcWOizK M1YxCSbbZsUVrB+fj4K5IXqzWtlQX12NxBSxqYwD2+XHFgzKyhKVeaJejI2QfQvgB/Sh PALA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:in-reply-to:references:date :message-id:subject:from:to:cc:content-type; bh=5SCRfqLTt4cxDu71aE6hZoTePiFYTQO5OUaxQ0n5jRA=; b=HutussB7OcA3jc2BCO6UdROqYTJVEFX0DAvf/QqJEh3d4vfpAahF+6qn17hWmb6o6I 573Bu9bNr4ZS0wiB+vAD//+kYnm8/iC1x6Eg82c0LkCcWTR/SoBQrfdHJELNrzyWnoHc LJH2rtozjmVmUgpOW0OaoI702td1pFRdKU5RkNMs2i8n2ozzjFcsYLW8oaVoTbFvgJuE jQ9m30b7uxeI0w1CAjDQcKX9gE0T2AApT+OhcK2w3FZie6Q9KwtuTt+WT582caPtAd5M RdbYDuhr1Z/PgY9snqrswdRDeWvfGv65YFxtKcwNmDj4+AAcZ+ouXRodKjKqupaDjZZg PrEw== X-Gm-Message-State: ALoCoQl0AH/ukwcYC9inwG1GNXneu+fhaFMKtjBl2w/YnipLEMNDbkmLAigOhw7zf6uKD8tDwJLh MIME-Version: 1.0 X-Received: by 10.52.236.163 with SMTP id uv3mr6467421vdc.85.1402087751279; Fri, 06 Jun 2014 13:49:11 -0700 (PDT) Received: by 10.52.174.234 with HTTP; Fri, 6 Jun 2014 13:49:11 -0700 (PDT) In-Reply-To: References: <539145B4.5000200@gmail.com> Date: Fri, 6 Jun 2014 13:49:11 -0700 Message-ID: Subject: Re: Problems booting exynos5420 with >1 CPU From: Doug Anderson To: Abhilash Kesavan Cc: Tushar Behera , linux-samsung-soc , "Turquette, Mike" , Kevin Hilman , Thomas Abraham , Arun Kumar , Olof Johansson , Sonny Rao , Javier Martinez Canillas , linux-arm-kernel , Andrew Bresticker Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-7.4 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On Fri, Jun 6, 2014 at 12:09 PM, Abhilash Kesavan wrote: > Hi Doug, > > On Sat, Jun 7, 2014 at 12:26 AM, Doug Anderson wrote: >> Abhilash, >> >> On Fri, Jun 6, 2014 at 11:31 AM, Abhilash Kesavan >> wrote: >>> Hi Doug, >>> >>> On Fri, Jun 6, 2014 at 11:50 PM, Doug Anderson wrote: >>>> Abhilash, >>>> >>>> >>>> >>>> On Fri, Jun 6, 2014 at 11:12 AM, Abhilash Kesavan >>>> wrote: >>>>> Hi Doug, >>>>> >>>>> On Fri, Jun 6, 2014 at 11:32 PM, Doug Anderson wrote: >>>>>> Abhilash, >>>>>> >>>>>> On Fri, Jun 6, 2014 at 10:36 AM, Abhilash Kesavan >>>>>> wrote: >>>>>>> Hi Doug, >>>>>>> >>>>>>> The first change in the kernel (clearing an iRAM location) is needed >>>>>>> because of an unnecessary change that we are carrying in the Chrome >>>>>>> U-boot. There is no reason for us to have the workaround in the >>>>>>> mainline kernel. Rather, we should remove the check from our u-boot. >>>>>>> However AFAIR a clean-up patch that I had posted internally was not >>>>>>> accepted as we had frozen the SPL at the time. >>>>>> >>>>>> Ah, is that this one, or a different one? >>>>>> >>>>>> https://chromium-review.googlesource.com/#/c/66049/ >>>>> Yes, this along with a kernel side change. >>>> >>>> Can we safely take this one without the kernel-side one? >>> Yes, just the u-boot change should suffice. >>>> >>>> >>>>>> If we land that patch now it won't help since nobody is going to be >>>>>> updating their read-only firmware. We'll need to put code somewhere >>>>>> that fixes it. >>>>> We just carry the workaround fix locally until we migrate to mainline >>>>> u-boot for 5420 where the unnecessay check will not be present. >>>> >>>> I think there are people out there who want to run a mainline kernel >>>> on existing Chromebook 2 hardware and don't want to rewrite their RO >>>> firmware. We need a solution for those people. >>> Yes, I see your point. But, do you think someone who has changed the >>> existing fused kernel on the device to a mainline one would be averse >>> to applying a couple of small work-around changes as well ? Their >>> finding this thread and the proposed "magic" fixes may be difficult >>> but not the actual application I think. >>> >>> How about having a page similar to >>> "http://www.chromium.org/chromium-os/how-tos-and-troubleshooting/using-an-upstream-kernel-on-snow" >>> for Peach ? We could have the work-arounds listed there. >> >> We can (though the fewer weird things we have the better), but we >> definitely need to provide workarounds that don't require people to >> change their RO firmware. > I do not quite agree with this. They do not need to change their RO > firmware, just modify their boot commands. >> >> Thinking all that through, I think the answer is that we want to >> abandon the U-Boot change above >> . At this point >> we're never going to take it at this point and there's no possible way >> to do it in an RW firmware update (right?) since any workaround would >> be overwritten by the SPL at resume time. > Sure, will abandon. >> >> So the proper "fix" for the "mw.l 02073028 0" is a kernel fix. ...and > I believe there is no "proper" fix for incorrect existing code in > non-mainline u-boot. > >> if upstream doesn't want land it because it's impure then we'll just >> have to list it on our "apply these hacks to your kernel". You sent >> me this as a kernel fix before and now I think I understand why (to >> handle the s2r case). Can you please post this up to the mailing >> list? Please make sure it will handle the suspend/resume case >> whenever suspend/resume starts working (I haven't tested but I >> remember hearing that it doesn't work). > > Are you talking about the re-writing the mcpm entry point address post-resume ? Or even (as Andrew points out) just don't use it. This works and IMHO is much cleaner because it totally removes the U-Boot dependency. I'll cleanup to not be so insane and post: { .compatible = "samsung,exynos5800" }, @@ -346,8 +354,9 @@ static int __init exynos_mcpm_init(void) * Future entries into the kernel can now go * through the cluster entry vectors. */ - __raw_writel(virt_to_phys(mcpm_entry_point), - ns_sram_base_addr + MCPM_BOOT_ADDR_OFFSET); + __raw_writel(((u32*)exynos_mcpm_secondary_cpu_start)[0], ns_sram_base_addr); + __raw_writel(((u32*)exynos_mcpm_secondary_cpu_start)[1], ns_sram_base_addr + 4); + __raw_writel(virt_to_phys(mcpm_entry_point), ns_sram_base_addr + 8); -Doug --- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm/mach-exynos/mcpm-exynos.c b/arch/arm/mach-exynos/mcpm-exynos.c index 0498d0b..9c5df7b 100644 --- a/arch/arm/mach-exynos/mcpm-exynos.c +++ b/arch/arm/mach-exynos/mcpm-exynos.c @@ -290,6 +290,14 @@ static void __naked exynos_pm_power_up_setup(unsigned int affinity_level) "b cci_enable_port_for_self"); } +static void __naked exynos_mcpm_secondary_cpu_start(void) +{ + asm volatile ("\n" + "ldr r0, [pc, #0]\n" + "bx r0\n" + ".word 0" ); +} + static const struct of_device_id exynos_dt_mcpm_match[] = { { .compatible = "samsung,exynos5420" },