From patchwork Thu Oct 27 11:49:11 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anand Moon X-Patchwork-Id: 9399493 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 8A6126059C for ; Thu, 27 Oct 2016 14:21:55 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6C2032A2F9 for ; Thu, 27 Oct 2016 14:21:55 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 60B9D2A2FA; Thu, 27 Oct 2016 14:21:55 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.3 required=2.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, RCVD_IN_SORBS_SPAM, T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 444FE2A307 for ; Thu, 27 Oct 2016 14:21:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S941635AbcJ0OUr (ORCPT ); Thu, 27 Oct 2016 10:20:47 -0400 Received: from mail-oi0-f54.google.com ([209.85.218.54]:34263 "EHLO mail-oi0-f54.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S936617AbcJ0OUm (ORCPT ); Thu, 27 Oct 2016 10:20:42 -0400 Received: by mail-oi0-f54.google.com with SMTP id p136so4867901oic.1 for ; Thu, 27 Oct 2016 07:19:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=ObNXicQXjf8nYcyNZ6VDrkszWlCcIqwMsjaxSY6whdk=; b=micYvSyAdHRnCMSwsj/CMl76LpPxueM1HQvHi07a5h0NWpd0ulzjXv4JrQHlGN7nWT rKLJ/k2HpPDBnJVoYBn3wN/oqUBAIkxS3CZC1RvXPe7liJtF/1yMWNkqqalefGFLCwN4 Mo123N7166ddTj18VoXomf+qJugzA7KLKAZ1RXU6QEi340oZofd9/AFzZ6qHc10xa2QH bHs8uUs4bSvH9Ynd2qV+zMSkzQd/qgQGrMo5IYdqtNTN2x3oz9lX+g1szLfUUyoMSDAp 0mvnls216sybJ2P6G2Vn6aIiC7uW7H6ZoTeUQbFRqHiqZCSKAfI80njDo3E7vZJtoqYn ldRw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=ObNXicQXjf8nYcyNZ6VDrkszWlCcIqwMsjaxSY6whdk=; b=huOQ3tTWliJrnCV/N9U8oygNDULjBtTvZrHKiyXeslW6HDhsX55Fl/89POMcxNR8+6 Xfs4VJjR+PZe5VrW6iZBFbdYj5YdaL33v/mA4rB0nudJrGK9pMWGwhuHt1BoIWfckU2P V0OMkkXEviTb/HHikTkTgQ5eLj2Ns9M85c5JljhVlIAavb+wsYwafQ8ZuN8CitKcBci5 j8i+ZCDcTDWnEoKZN3sTroq9hK1+z7ZGPFUjZKvXm7fZWQyw8GW8U/rDXnAtFm+YoHoG ppOleLyN19l9dlb1Lj0rLvhjoDfciObIjzxgAGoCH51lXBtGWU1wBf7AnJw4z0B6UzqI pwYQ== X-Gm-Message-State: ABUngvefGR13kuuJr1agNOLU0pN/cLJ3cFv3HnRpZD0jjzwU6RAVdRULN74a9o06LRASianeOnXwCHLpVSvtSg== X-Received: by 10.202.199.66 with SMTP id x63mr7082659oif.25.1477568972114; Thu, 27 Oct 2016 04:49:32 -0700 (PDT) MIME-Version: 1.0 Received: by 10.157.11.247 with HTTP; Thu, 27 Oct 2016 04:49:11 -0700 (PDT) In-Reply-To: <20161026175827.GA10224@kozik-lap> References: <20161026165348.GA5600@kozik-lap> <20161026175827.GA10224@kozik-lap> From: Anand Moon Date: Thu, 27 Oct 2016 17:19:11 +0530 Message-ID: Subject: Re: Pinctrl nodes missing for USB To: Krzysztof Kozlowski Cc: Javier Martinez Canillas , Chanwoo Choi , Kukjin Kim , Marek Szyprowski , "linux-samsung-soc@vger.kernel.org" , linux-arm-kernel , Vivek Gautam Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Hi Krzysztof, On 26 October 2016 at 23:28, Krzysztof Kozlowski wrote: > On Wed, Oct 26, 2016 at 11:15:51PM +0530, Anand Moon wrote: >> Hi Krzysztof >> >> On 26 October 2016 at 22:23, Krzysztof Kozlowski wrote: >> > On Wed, Oct 26, 2016 at 05:56:54PM +0530, Anand Moon wrote: >> >> Hi All, >> >> >> >> I have tried to enable CONFIG_DEBUG_PINCTRL=y on Odroid XU4. >> >> Just to try to understand the feature. >> >> Is this feature suppoted for USB nodes. >> >> >> >> Below is the output of failed to pase pinctrl for USB nodes via dts. >> > >> > I do not see any question here... >> > >> > Anyway the devices not instantiated from DT will have such warning and >> > USB devices are not present in DT, from obvious reasons... However what >> > surprises me is why pinctrl_dt_to_map() was called for USB devices? >> > >> > Best regards, >> > Krzysztof >> > >> [snip] >> >> Sorry. I was just referring HK odroidxu3 dts for reference for dwc3 controller. >> >> https://github.com/hardkernel/linux/blob/odroidxu3-3.10.y/arch/arm/boot/dts/exynos5422-odroidxu3.dts#L525 >> >> I am just trying to understand if such a configuration possible for >> dwc3 controllers. > > What do you mean by "configuration"? Which configuration? I am just elaborating what I have understood below. > > Best regards, > Krzysztof > Adding Vivek Gautam + Apologize for my poor English and explanation of what I am trying to work on or understand the feature related to dwc3 For some time I am trying to figure out the performance issue of USB 3.0 on Odroid XU4 boards. [1] https://lkml.org/lkml/2015/2/2/259 Following above patch helps registration of USB storage device to "Super-Speed" ie root@odroidcsh:/usr/src/odroidxu3-4.y-devel# lsusb -t /: Bus 06.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 5000M /: Bus 05.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 480M |__ Port 1: Dev 3, If 0, Class=Vendor Specific Class, Driver=r8152, 480M /: Bus 04.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 5000M |__ Port 1: Dev 2, If 0, Class=Hub, Driver=hub/2p, 5000M |__ Port 1: Dev 3, If 0, Class=Mass Storage, Driver=usb-storage, 5000M |__ Port 2: Dev 4, If 0, Class=Mass Storage, Driver=usb-storage, 5000M /: Bus 03.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 480M |__ Port 1: Dev 2, If 0, Class=Hub, Driver=hub/2p, 480M /: Bus 02.Port 1: Dev 1, Class=root_hub, Driver=exynos-ohci/3p, 12M /: Bus 01.Port 1: Dev 1, Class=root_hub, Driver=exynos-ehci/3p, 480M But the performance is not good enough to work on the storage device. we cannot compile whole kernel or source code on this drive attached. So did some investigation on this by comparing the dts nodes and driver. I was looking into some logic to do some "gpio_reset" which will help reset the driver. But after studying the driver code of OdroidXU4 Hardkernel, I tried to understand the requirement of gpio pin controlled by pinctrl. Sorry I am not an expert in the internal of the the pinctrl and internal gpio bus. So I have just for my understanding created this small patch to help elaborate this feature. -------------------------------------------------------------------------------------------- root@odroidcsh:/usr/src/odroidxu3-4.y-devel# git diff arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi -------------------------------------------------------------------------------------------- Here is the core logic as I understood out of the driver code from OdroidXU3 Hardkernel. so we have samsung,bsess-gpio and samsung,id-gpio two gpio pins control by the exynos-dwc3 driver in the Odroid Hardkernel # drivers/usb/dwc3/dwc3-exynos.c tries to register interrupts on these gpio pin to control the flow via gpio-irq. Also It monitor the vbus controller changes Below irq to monitor id-gpio thread. https://github.com/hardkernel/linux/blob/odroidxu3-3.10.y/drivers/usb/dwc3/dwc3-exynos.c#L217 Below irq to monitor bsess-gpio thread. https://github.com/hardkernel/linux/blob/odroidxu3-3.10.y/drivers/usb/dwc3/dwc3-exynos.c#L230 Once again I am not an expert in this configuration, I am just trying to map the feature and the code. Please let me know If my understanding is wrong or the feature should work little bit different. I am poor in English to explain technically details. If any body have any other input on this please let me know. -Best Regards Anand Moon --- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi index 246d298..03e90b6 100644 --- a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi +++ b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi @@ -560,6 +560,24 @@ samsung,pin-pud = ; samsung,pin-drv = ; }; + + b_sess0_irq: b-sess0-irq { + samsung,pins = "gpx3-5"; + samsung,pin-function = <0xf>; + samsung,pin-pud = <0>; + }; + + b_sess1_irq: b-sess1-irq { + samsung,pins = "gpx3-4"; + samsung,pin-function = <0xf>; + samsung,pin-pud = <0>; + }; + + id2_irq: id2-irq { + samsung,pins = "gpx1-1"; + samsung,pin-function = <0xf>; + samsung,pin-pud = <0>; + }; }; &pinctrl_1 { @@ -569,6 +587,12 @@ samsung,pin-pud = ; samsung,pin-drv = ; }; + + id1_irq: id1-irq { + samsung,pins = "gpc1-0"; + samsung,pin-function = <0xf>; + samsung,pin-pud = <3>; + }; }; &tmu_cpu0 { @@ -604,11 +628,23 @@ /* usbdrd_dwc3_1 mode customized in each board */ &usbdrd3_0 { + samsung,bsess-gpio = <&gpx3 5 0xf>; + pinctrl-names = "default"; + pinctrl-0 = <&b_sess0_irq>; + samsung,id-gpio = <&gpc1 0 0xf>; + pinctrl-names = "default"; + pinctrl-0 = <&id1_irq>; vdd33-supply = <&ldo9_reg>; vdd10-supply = <&ldo11_reg>; }; &usbdrd3_1 { + samsung,bsess-gpio = <&gpx3 4 0xf>; + pinctrl-names = "default"; + pinctrl-0 = <&b_sess1_irq>; + samsung,id-gpio = <&gpx1 1 0xf>; + pinctrl-names = "default"; + pinctrl-0 = <&id2_irq>; vdd33-supply = <&ldo9_reg>; vdd10-supply = <&ldo11_reg>; };