| Message ID | a357d30b-9f83-ec65-c8a1-a9e81236f9ee@xs4all.nl (mailing list archive) |
|---|---|
| State | Accepted |
| Headers | show |
On Tue, Jun 13, 2017 at 03:47:06PM +0200, Hans Verkuil wrote: > The Odroid-U3 board has an IP4791CZ12 level shifter that is > disabled if the HPD is low, which means that the CEC pin is > disabled as well. > > Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com> > --- > Changes since v1: moved &hdmicec to after &buck to keep it somewhat > alphabetical. > --- > arch/arm/boot/dts/exynos4412-odroidu3.dts | 4 ++++ > 1 file changed, 4 insertions(+) Thanks, applied. Best regards, Krzysztof -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/arch/arm/boot/dts/exynos4412-odroidu3.dts b/arch/arm/boot/dts/exynos4412-odroidu3.dts index 7504a5aa538e..44a4de08466b 100644 --- a/arch/arm/boot/dts/exynos4412-odroidu3.dts +++ b/arch/arm/boot/dts/exynos4412-odroidu3.dts @@ -78,6 +78,10 @@ regulator-max-microvolt = <3300000>; }; +&hdmicec { + needs-hpd; +}; + /* VDDQ for MSHC (eMMC card) */ &ldo22_reg { regulator-name = "LDO22_VDDQ_MMC4_2.8V";
The Odroid-U3 board has an IP4791CZ12 level shifter that is disabled if the HPD is low, which means that the CEC pin is disabled as well. Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com> --- Changes since v1: moved &hdmicec to after &buck to keep it somewhat alphabetical. --- arch/arm/boot/dts/exynos4412-odroidu3.dts | 4 ++++ 1 file changed, 4 insertions(+)