From patchwork Thu Nov 12 13:12:04 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pavel Fedin X-Patchwork-Id: 7602071 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id C3AA3BF90C for ; Thu, 12 Nov 2015 13:13:43 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 4EA8F201C8 for ; Thu, 12 Nov 2015 13:13:41 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 9F8FF207A2 for ; Thu, 12 Nov 2015 13:13:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752202AbbKLNNR (ORCPT ); Thu, 12 Nov 2015 08:13:17 -0500 Received: from mailout2.w1.samsung.com ([210.118.77.12]:37068 "EHLO mailout2.w1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752641AbbKLNMR (ORCPT ); Thu, 12 Nov 2015 08:12:17 -0500 Received: from eucpsbgm1.samsung.com (unknown [203.254.199.244]) by mailout2.w1.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTP id <0NXP005PLE0EN750@mailout2.w1.samsung.com>; Thu, 12 Nov 2015 13:12:14 +0000 (GMT) X-AuditID: cbfec7f4-f79c56d0000012ee-ed-5644902e6a51 Received: from eusync2.samsung.com ( [203.254.199.212]) by eucpsbgm1.samsung.com (EUCPMTA) with SMTP id 7A.23.04846.E2094465; Thu, 12 Nov 2015 13:12:14 +0000 (GMT) Received: from fedinw7x64.rnd.samsung.ru ([106.109.131.169]) by eusync2.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0NXP00EVLE08G810@eusync2.samsung.com>; Thu, 12 Nov 2015 13:12:14 +0000 (GMT) From: Pavel Fedin To: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Kukjin Kim , Krzysztof Kozlowski Subject: [PATCH v8 1/4] Documentation: dt-bindings: Describe SROMc configuration Date: Thu, 12 Nov 2015 16:12:04 +0300 Message-id: X-Mailer: git-send-email 2.4.4 In-reply-to: References: In-reply-to: References: X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrBLMWRmVeSWpSXmKPExsVy+t/xK7p6E1zCDJ7NYrGYf+Qcq0X/m4Ws FuderWS0eP3C0KL/8Wtmi02Pr7FaXN41h81ixvl9TBZLr19kspgwfS2LReveI+wO3B5r5q1h 9Ljc18vksXL5FzaPTas62Tw2L6n36NuyitHj8ya5APYoLpuU1JzMstQifbsErozGi0/ZC/bL Vrw52cnSwNgi1sXIySEhYCJxYM9WNghbTOLCvfVgtpDAUkaJLQ+Uuhi5gOw2Jom23t+MIAk2 AXWJ018/sIAkRATaGSWONW5kAnGYBSYySSyZvh+oioNDWCBA4tNHHpAGFgFVifnzVrGA2LwC 0RIHOjZDbZOTuHJ9OpjNKWAusbi1gQlis5nE+lfXWXGJT2DkX8DIsIpRNLU0uaA4KT3XUK84 Mbe4NC9dLzk/dxMjJHy/7GBcfMzqEKMAB6MSD++Emc5hQqyJZcWVuYcYJTiYlUR4E9JcwoR4 UxIrq1KL8uOLSnNSiw8xSnOwKInzzt31PkRIID2xJDU7NbUgtQgmy8TBKdXAGHq/NWoez+q3 XTfnTNr5rcXPnyni2WKVKuVTgm1OFV82XQtUf7C6vTuJcctpU1H+v34xbEdE+6RZUq9vVGN+ f33tHPVJv5+tybETzZ+r/85ky6e/18N2v4zdafP13D2OjqnVoSyWW8x//7F+bNPzV+3XFuv0 dz9XBvZOY13K/NXjxc663UH/9ZVYijMSDbWYi4oTASubbWFbAgAA Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-7.3 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add documentation for new subnode properties, allowing bank configuration. Based on u-boot implementation, but heavily reworked. Also, fix size of SROMc mapping in the example. Signed-off-by: Pavel Fedin Reviewed-by: Krzysztof Kozlowski Acked-by: Rob Herring --- .../bindings/arm/samsung/exynos-srom.txt | 73 +++++++++++++++++++++- 1 file changed, 71 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/samsung/exynos-srom.txt b/Documentation/devicetree/bindings/arm/samsung/exynos-srom.txt index 33886d5..07c8507 100644 --- a/Documentation/devicetree/bindings/arm/samsung/exynos-srom.txt +++ b/Documentation/devicetree/bindings/arm/samsung/exynos-srom.txt @@ -5,8 +5,77 @@ Required properties: - reg: offset and length of the register set -Example: +Optional properties: +The SROM controller can be used to attach external peripherals. In this case +extra properties, describing the bus behind it, should be specified as below: + +- #address-cells: Must be set to 2 to allow device address translation. + Address is specified as (bank#, offset). + +- #size-cells: Must be set to 1 to allow device size passing + +- ranges: Must be set up to reflect the memory layout with four integer values + per bank: + 0 + +Sub-nodes: +The actual device nodes should be added as subnodes to the SROMc node. These +subnodes, except regular device specification, should contain the following +properties, describing configuration of the relevant SROM bank: + +Required properties: +- reg: bank number, base address (relative to start of the bank) and size of + the memory mapped for the device. Note that base address will be + typically 0 as this is the start of the bank. + +- samsung,srom-timing : array of 6 integers, specifying bank timings in the + following order: Tacp, Tcah, Tcoh, Tacc, Tcos, Tacs. + Each value is specified in cycles and has the following + meaning and valid range: + Tacp : Page mode access cycle at Page mode (0 - 15) + Tcah : Address holding time after CSn (0 - 15) + Tcoh : Chip selection hold on OEn (0 - 15) + Tacc : Access cycle (0 - 31, the actual time is N + 1) + Tcos : Chip selection set-up before OEn (0 - 15) + Tacs : Address set-up before CSn (0 - 15) + +Optional properties: +- reg-io-width : data width in bytes (1 or 2). If omitted, default of 1 is used. + +- samsung,srom-page-mode : page mode configuration for the bank: + 0 - normal (one data) + 1 - four data + If omitted, default of 0 is used. + +Example: basic definition, no banks are configured + sromc@12570000 { + compatible = "samsung,exynos-srom"; + reg = <0x12570000 0x14>; + }; + +Example: SROMc with SMSC911x ethernet chip on bank 3 sromc@12570000 { + #address-cells = <2>; + #size-cells = <1>; + ranges = <0 0 0x04000000 0x20000 // Bank0 + 1 0 0x05000000 0x20000 // Bank1 + 2 0 0x06000000 0x20000 // Bank2 + 3 0 0x07000000 0x20000>; // Bank3 + compatible = "samsung,exynos-srom"; - reg = <0x12570000 0x10>; + reg = <0x12570000 0x14>; + + ethernet@3 { + compatible = "smsc,lan9115"; + reg = <3 0 0x10000>; // Bank 3, offset = 0 + phy-mode = "mii"; + interrupt-parent = <&gpx0>; + interrupts = <5 8>; + reg-io-width = <2>; + smsc,irq-push-pull; + smsc,force-internal-phy; + + samsung,srom-page-mode = <1>; + samsung,srom-timing = <9 12 1 9 1 1>; + }; };