mbox series

[v8,00/10] Enable HS-G5 support on SM8550

Message ID 1701520577-31163-1-git-send-email-quic_cang@quicinc.com (mailing list archive)
Headers show
Series Enable HS-G5 support on SM8550 | expand

Message

Can Guo Dec. 2, 2023, 12:36 p.m. UTC
This series enables HS-G5 support on SM8550.

This series is rebased on below changes from Mani -
https://patchwork.kernel.org/project/linux-scsi/patch/20230908145329.154024-1-manivannan.sadhasivam@linaro.org/
https://patchwork.kernel.org/project/linux-scsi/patch/20230908145329.154024-2-manivannan.sadhasivam@linaro.org/

This series is tested on below HW combinations -
SM8550 MTP + UFS4.0
SM8550 QRD + UFS3.1
SM8450 MTP + UFS3.1 (for regression test)
SM8350 MTP + UFS3.1 (for regression test)

Note that during reboot test on above platforms, I occasinally hit PA (PHY)
error during the 2nd init, this is not related with this series. A fix for
this is mentioned in below patchwork -

https://patchwork.kernel.org/project/linux-scsi/patch/1698145815-17396-1-git-send-email-quic_ziqichen@quicinc.com/

Also note that on platforms, which have two sets of UFS PHY settings are
provided (say G4 and no-G4, G5 and no-G5). The two sets of PHY settings are
basically programming different values to different registers, mixing the
two sets and/or overwriting one set with another set is definitely not
blessed by UFS PHY designers. For SM8550, this series will make sure we
honor the rule. However, for old targets Mani and I will fix them in
another series in future.

v7 -> v8:
In "scsi: ufs: ufs-qcom: Add support for UFS device version detection", fixed a BUG introduced from v6 -> v7. The spare register is added since HW ver 5, although reading the spare register on HW ver 4 is just getting 0x0, to be on the safe side, we are exluding HW ver 4.

v6 -> v7:
1. Rebased on linux-next, based SM8650 PHY settings are merged there, no changes to patches for UFS driver
2. Addressed comments from Mani

v5 -> v6:
1. Rebased on scsi-queue-6.8
2. Addressed comments from Dmitry and Mani in patches to phy-qcom-qmp-ufs.c

v4 -> v5:
Removed two useless debug prints in patch #9

v3 -> v4:
Used .tbls_hs_overlay array instead of adding more tables with different names like .tbls_hs_g5

v2 -> v3:
1. Addressed comments from Andrew, Mani and Bart in patch #1
2. Added patch #2 as per request from Andrew and Mani
3. Added patch #4 to fix a common issue on old targets, it is not necessary
   for this series, but put in this series only because it would be easier
   to maintain and no need to rebase
4. Addressed comments from Dmitry and Mani in patches to phy-qcom-qmp-ufs.c

v1 -> v2:
1. Removed 2 changes which were exposing power info in sysfs
2. Removed 1 change which was moving data structs to phy-qcom-qmp-ufs.h
3. Added one new change (the 1st one) to clean up usage of ufs_dev_params based on comments from Mani
4. Adjusted the logic of UFS device version detection according to comments from Mani:
	4.1 For HW version < 0x5, go through dual init
 	4.2 For HW version >= 0x5
		a. If UFS device version is populated, one init is required
		b. If UFS device version is not populated, go through dual init

Bao D. Nguyen (1):
  scsi: ufs: ufs-qcom: Add support for UFS device version detection

Can Guo (9):
  scsi: ufs: host: Rename structure ufs_dev_params to ufs_host_params
  scsi: ufs: ufs-qcom: No need to set hs_rate after
    ufshcd_init_host_param()
  scsi: ufs: ufs-qcom: Setup host power mode during init
  scsi: ufs: ufs-qcom: Allow the first init start with the maximum
    supported gear
  scsi: ufs: ufs-qcom: Limit HS-G5 Rate-A to hosts with HW version 5
  scsi: ufs: ufs-qcom: Set initial PHY gear to max HS gear for HW ver 4
    and newer
  scsi: ufs: ufs-qcom: Check return value of phy_set_mode_ext()
  phy: qualcomm: phy-qcom-qmp-ufs: Rectify SM8550 UFS HS-G4 PHY Settings
  phy: qualcomm: phy-qcom-qmp-ufs: Add High Speed Gear 5 support for
    SM8550

 drivers/phy/qualcomm/phy-qcom-qmp-pcs-ufs-v6.h     |   2 +
 drivers/phy/qualcomm/phy-qcom-qmp-qserdes-com-v6.h |   2 +
 .../qualcomm/phy-qcom-qmp-qserdes-txrx-ufs-v6.h    |   9 +
 drivers/phy/qualcomm/phy-qcom-qmp-ufs.c            | 191 ++++++++++++++++++---
 drivers/ufs/host/ufs-exynos.c                      |   7 +-
 drivers/ufs/host/ufs-hisi.c                        |  11 +-
 drivers/ufs/host/ufs-mediatek.c                    |  12 +-
 drivers/ufs/host/ufs-qcom.c                        |  97 ++++++++---
 drivers/ufs/host/ufs-qcom.h                        |   7 +-
 drivers/ufs/host/ufshcd-pltfrm.c                   |  69 ++++----
 drivers/ufs/host/ufshcd-pltfrm.h                   |  10 +-
 11 files changed, 309 insertions(+), 108 deletions(-)

Comments

Neil Armstrong Dec. 7, 2023, 8:22 a.m. UTC | #1
Hi Can,

On 02/12/2023 13:36, Can Guo wrote:
> This series enables HS-G5 support on SM8550.
> 
> This series is rebased on below changes from Mani -
> https://patchwork.kernel.org/project/linux-scsi/patch/20230908145329.154024-1-manivannan.sadhasivam@linaro.org/
> https://patchwork.kernel.org/project/linux-scsi/patch/20230908145329.154024-2-manivannan.sadhasivam@linaro.org/
> 
> This series is tested on below HW combinations -
> SM8550 MTP + UFS4.0
> SM8550 QRD + UFS3.1
> SM8450 MTP + UFS3.1 (for regression test)
> SM8350 MTP + UFS3.1 (for regression test)
> 
> Note that during reboot test on above platforms, I occasinally hit PA (PHY)
> error during the 2nd init, this is not related with this series. A fix for
> this is mentioned in below patchwork -
> 
> https://patchwork.kernel.org/project/linux-scsi/patch/1698145815-17396-1-git-send-email-quic_ziqichen@quicinc.com/
> 
> Also note that on platforms, which have two sets of UFS PHY settings are
> provided (say G4 and no-G4, G5 and no-G5). The two sets of PHY settings are
> basically programming different values to different registers, mixing the
> two sets and/or overwriting one set with another set is definitely not
> blessed by UFS PHY designers. For SM8550, this series will make sure we
> honor the rule. However, for old targets Mani and I will fix them in
> another series in future.

You dropped my tested-by tags, but I did a new test with v8 and:

Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550-QRD
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8650-QRD

Thanks,
Neil

> 
> v7 -> v8:
> In "scsi: ufs: ufs-qcom: Add support for UFS device version detection", fixed a BUG introduced from v6 -> v7. The spare register is added since HW ver 5, although reading the spare register on HW ver 4 is just getting 0x0, to be on the safe side, we are exluding HW ver 4.
> 
> v6 -> v7:
> 1. Rebased on linux-next, based SM8650 PHY settings are merged there, no changes to patches for UFS driver
> 2. Addressed comments from Mani
> 
> v5 -> v6:
> 1. Rebased on scsi-queue-6.8
> 2. Addressed comments from Dmitry and Mani in patches to phy-qcom-qmp-ufs.c
> 
> v4 -> v5:
> Removed two useless debug prints in patch #9
> 
> v3 -> v4:
> Used .tbls_hs_overlay array instead of adding more tables with different names like .tbls_hs_g5
> 
> v2 -> v3:
> 1. Addressed comments from Andrew, Mani and Bart in patch #1
> 2. Added patch #2 as per request from Andrew and Mani
> 3. Added patch #4 to fix a common issue on old targets, it is not necessary
>     for this series, but put in this series only because it would be easier
>     to maintain and no need to rebase
> 4. Addressed comments from Dmitry and Mani in patches to phy-qcom-qmp-ufs.c
> 
> v1 -> v2:
> 1. Removed 2 changes which were exposing power info in sysfs
> 2. Removed 1 change which was moving data structs to phy-qcom-qmp-ufs.h
> 3. Added one new change (the 1st one) to clean up usage of ufs_dev_params based on comments from Mani
> 4. Adjusted the logic of UFS device version detection according to comments from Mani:
> 	4.1 For HW version < 0x5, go through dual init
>   	4.2 For HW version >= 0x5
> 		a. If UFS device version is populated, one init is required
> 		b. If UFS device version is not populated, go through dual init
> 
> Bao D. Nguyen (1):
>    scsi: ufs: ufs-qcom: Add support for UFS device version detection
> 
> Can Guo (9):
>    scsi: ufs: host: Rename structure ufs_dev_params to ufs_host_params
>    scsi: ufs: ufs-qcom: No need to set hs_rate after
>      ufshcd_init_host_param()
>    scsi: ufs: ufs-qcom: Setup host power mode during init
>    scsi: ufs: ufs-qcom: Allow the first init start with the maximum
>      supported gear
>    scsi: ufs: ufs-qcom: Limit HS-G5 Rate-A to hosts with HW version 5
>    scsi: ufs: ufs-qcom: Set initial PHY gear to max HS gear for HW ver 4
>      and newer
>    scsi: ufs: ufs-qcom: Check return value of phy_set_mode_ext()
>    phy: qualcomm: phy-qcom-qmp-ufs: Rectify SM8550 UFS HS-G4 PHY Settings
>    phy: qualcomm: phy-qcom-qmp-ufs: Add High Speed Gear 5 support for
>      SM8550
> 
>   drivers/phy/qualcomm/phy-qcom-qmp-pcs-ufs-v6.h     |   2 +
>   drivers/phy/qualcomm/phy-qcom-qmp-qserdes-com-v6.h |   2 +
>   .../qualcomm/phy-qcom-qmp-qserdes-txrx-ufs-v6.h    |   9 +
>   drivers/phy/qualcomm/phy-qcom-qmp-ufs.c            | 191 ++++++++++++++++++---
>   drivers/ufs/host/ufs-exynos.c                      |   7 +-
>   drivers/ufs/host/ufs-hisi.c                        |  11 +-
>   drivers/ufs/host/ufs-mediatek.c                    |  12 +-
>   drivers/ufs/host/ufs-qcom.c                        |  97 ++++++++---
>   drivers/ufs/host/ufs-qcom.h                        |   7 +-
>   drivers/ufs/host/ufshcd-pltfrm.c                   |  69 ++++----
>   drivers/ufs/host/ufshcd-pltfrm.h                   |  10 +-
>   11 files changed, 309 insertions(+), 108 deletions(-)
>
Can Guo Dec. 7, 2023, 8:26 a.m. UTC | #2
Hi Neil,

On 12/7/2023 4:22 PM, neil.armstrong@linaro.org wrote:
> Hi Can,
> 
> On 02/12/2023 13:36, Can Guo wrote:
>> This series enables HS-G5 support on SM8550.
>>
>> This series is rebased on below changes from Mani -
>> https://patchwork.kernel.org/project/linux-scsi/patch/20230908145329.154024-1-manivannan.sadhasivam@linaro.org/
>> https://patchwork.kernel.org/project/linux-scsi/patch/20230908145329.154024-2-manivannan.sadhasivam@linaro.org/
>>
>> This series is tested on below HW combinations -
>> SM8550 MTP + UFS4.0
>> SM8550 QRD + UFS3.1
>> SM8450 MTP + UFS3.1 (for regression test)
>> SM8350 MTP + UFS3.1 (for regression test)
>>
>> Note that during reboot test on above platforms, I occasinally hit PA 
>> (PHY)
>> error during the 2nd init, this is not related with this series. A fix 
>> for
>> this is mentioned in below patchwork -
>>
>> https://patchwork.kernel.org/project/linux-scsi/patch/1698145815-17396-1-git-send-email-quic_ziqichen@quicinc.com/
>>
>> Also note that on platforms, which have two sets of UFS PHY settings are
>> provided (say G4 and no-G4, G5 and no-G5). The two sets of PHY 
>> settings are
>> basically programming different values to different registers, mixing the
>> two sets and/or overwriting one set with another set is definitely not
>> blessed by UFS PHY designers. For SM8550, this series will make sure we
>> honor the rule. However, for old targets Mani and I will fix them in
>> another series in future.
> 
> You dropped my tested-by tags, but I did a new test with v8 and:
> 
> Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550-QRD
> Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8650-QRD
> 

Thank you so much for testing this series.

I am sorry that I dropped the tested-by tags, since I slightly updated 
the last patch in this series, so I thought I should not apply the 
Tested-by tags from you.

Thanks,
Can Guo.

> Thanks,
> Neil
> 
>>
>> v7 -> v8:
>> In "scsi: ufs: ufs-qcom: Add support for UFS device version 
>> detection", fixed a BUG introduced from v6 -> v7. The spare register 
>> is added since HW ver 5, although reading the spare register on HW ver 
>> 4 is just getting 0x0, to be on the safe side, we are exluding HW ver 4.
>>
>> v6 -> v7:
>> 1. Rebased on linux-next, based SM8650 PHY settings are merged there, 
>> no changes to patches for UFS driver
>> 2. Addressed comments from Mani
>>
>> v5 -> v6:
>> 1. Rebased on scsi-queue-6.8
>> 2. Addressed comments from Dmitry and Mani in patches to 
>> phy-qcom-qmp-ufs.c
>>
>> v4 -> v5:
>> Removed two useless debug prints in patch #9
>>
>> v3 -> v4:
>> Used .tbls_hs_overlay array instead of adding more tables with 
>> different names like .tbls_hs_g5
>>
>> v2 -> v3:
>> 1. Addressed comments from Andrew, Mani and Bart in patch #1
>> 2. Added patch #2 as per request from Andrew and Mani
>> 3. Added patch #4 to fix a common issue on old targets, it is not 
>> necessary
>>     for this series, but put in this series only because it would be 
>> easier
>>     to maintain and no need to rebase
>> 4. Addressed comments from Dmitry and Mani in patches to 
>> phy-qcom-qmp-ufs.c
>>
>> v1 -> v2:
>> 1. Removed 2 changes which were exposing power info in sysfs
>> 2. Removed 1 change which was moving data structs to phy-qcom-qmp-ufs.h
>> 3. Added one new change (the 1st one) to clean up usage of 
>> ufs_dev_params based on comments from Mani
>> 4. Adjusted the logic of UFS device version detection according to 
>> comments from Mani:
>>     4.1 For HW version < 0x5, go through dual init
>>       4.2 For HW version >= 0x5
>>         a. If UFS device version is populated, one init is required
>>         b. If UFS device version is not populated, go through dual init
>>
>> Bao D. Nguyen (1):
>>    scsi: ufs: ufs-qcom: Add support for UFS device version detection
>>
>> Can Guo (9):
>>    scsi: ufs: host: Rename structure ufs_dev_params to ufs_host_params
>>    scsi: ufs: ufs-qcom: No need to set hs_rate after
>>      ufshcd_init_host_param()
>>    scsi: ufs: ufs-qcom: Setup host power mode during init
>>    scsi: ufs: ufs-qcom: Allow the first init start with the maximum
>>      supported gear
>>    scsi: ufs: ufs-qcom: Limit HS-G5 Rate-A to hosts with HW version 5
>>    scsi: ufs: ufs-qcom: Set initial PHY gear to max HS gear for HW ver 4
>>      and newer
>>    scsi: ufs: ufs-qcom: Check return value of phy_set_mode_ext()
>>    phy: qualcomm: phy-qcom-qmp-ufs: Rectify SM8550 UFS HS-G4 PHY Settings
>>    phy: qualcomm: phy-qcom-qmp-ufs: Add High Speed Gear 5 support for
>>      SM8550
>>
>>   drivers/phy/qualcomm/phy-qcom-qmp-pcs-ufs-v6.h     |   2 +
>>   drivers/phy/qualcomm/phy-qcom-qmp-qserdes-com-v6.h |   2 +
>>   .../qualcomm/phy-qcom-qmp-qserdes-txrx-ufs-v6.h    |   9 +
>>   drivers/phy/qualcomm/phy-qcom-qmp-ufs.c            | 191 
>> ++++++++++++++++++---
>>   drivers/ufs/host/ufs-exynos.c                      |   7 +-
>>   drivers/ufs/host/ufs-hisi.c                        |  11 +-
>>   drivers/ufs/host/ufs-mediatek.c                    |  12 +-
>>   drivers/ufs/host/ufs-qcom.c                        |  97 ++++++++---
>>   drivers/ufs/host/ufs-qcom.h                        |   7 +-
>>   drivers/ufs/host/ufshcd-pltfrm.c                   |  69 ++++----
>>   drivers/ufs/host/ufshcd-pltfrm.h                   |  10 +-
>>   11 files changed, 309 insertions(+), 108 deletions(-)
>>
>
Martin K. Petersen Dec. 14, 2023, 3:44 a.m. UTC | #3
Can,

> This series enables HS-G5 support on SM8550.

Applied patches 1-8 to 6.8/scsi-staging, thanks!

The phy patches didn't apply. I assume they'll go through the phy tree.
Martin K. Petersen Dec. 19, 2023, 2:18 a.m. UTC | #4
On Sat, 02 Dec 2023 04:36:06 -0800, Can Guo wrote:

> This series enables HS-G5 support on SM8550.
> 
> This series is rebased on below changes from Mani -
> https://patchwork.kernel.org/project/linux-scsi/patch/20230908145329.154024-1-manivannan.sadhasivam@linaro.org/
> https://patchwork.kernel.org/project/linux-scsi/patch/20230908145329.154024-2-manivannan.sadhasivam@linaro.org/
> 
> This series is tested on below HW combinations -
> SM8550 MTP + UFS4.0
> SM8550 QRD + UFS3.1
> SM8450 MTP + UFS3.1 (for regression test)
> SM8350 MTP + UFS3.1 (for regression test)
> 
> [...]

Applied to 6.8/scsi-queue, thanks!

[01/10] scsi: ufs: host: Rename structure ufs_dev_params to ufs_host_params
        https://git.kernel.org/mkp/scsi/c/fa3dca8251c4
[02/10] scsi: ufs: ufs-qcom: No need to set hs_rate after ufshcd_init_host_param()
        https://git.kernel.org/mkp/scsi/c/dc604b4c9d60
[03/10] scsi: ufs: ufs-qcom: Setup host power mode during init
        https://git.kernel.org/mkp/scsi/c/55820a7f2cb9
[04/10] scsi: ufs: ufs-qcom: Allow the first init start with the maximum supported gear
        https://git.kernel.org/mkp/scsi/c/743e1f596ccc
[05/10] scsi: ufs: ufs-qcom: Limit HS-G5 Rate-A to hosts with HW version 5
        https://git.kernel.org/mkp/scsi/c/9d8528a833fc
[06/10] scsi: ufs: ufs-qcom: Set initial PHY gear to max HS gear for HW ver 4 and newer
        https://git.kernel.org/mkp/scsi/c/0bd3cb895d19
[07/10] scsi: ufs: ufs-qcom: Check return value of phy_set_mode_ext()
        https://git.kernel.org/mkp/scsi/c/a68abdadfe13
[08/10] scsi: ufs: ufs-qcom: Add support for UFS device version detection
        https://git.kernel.org/mkp/scsi/c/dc7c948d74e1
Vinod Koul Dec. 21, 2023, 5:15 p.m. UTC | #5
On Sat, 02 Dec 2023 04:36:06 -0800, Can Guo wrote:
> This series enables HS-G5 support on SM8550.
> 
> This series is rebased on below changes from Mani -
> https://patchwork.kernel.org/project/linux-scsi/patch/20230908145329.154024-1-manivannan.sadhasivam@linaro.org/
> https://patchwork.kernel.org/project/linux-scsi/patch/20230908145329.154024-2-manivannan.sadhasivam@linaro.org/
> 
> This series is tested on below HW combinations -
> SM8550 MTP + UFS4.0
> SM8550 QRD + UFS3.1
> SM8450 MTP + UFS3.1 (for regression test)
> SM8350 MTP + UFS3.1 (for regression test)
> 
> [...]

Applied, thanks!

[09/10] phy: qualcomm: phy-qcom-qmp-ufs: Rectify SM8550 UFS HS-G4 PHY Settings
        commit: 5301b7a04040b0a6191856c765146e0a9ab88ebc
[10/10] phy: qualcomm: phy-qcom-qmp-ufs: Add High Speed Gear 5 support for SM8550
        (no commit info)

Best regards,