From patchwork Tue Aug 25 07:06:50 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Murthy Bhat X-Patchwork-Id: 7068691 Return-Path: X-Original-To: patchwork-linux-scsi@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 3987DC05AC for ; Tue, 25 Aug 2015 07:06:54 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 3BBCF20835 for ; Tue, 25 Aug 2015 07:06:53 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 3F2DC20833 for ; Tue, 25 Aug 2015 07:06:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752582AbbHYHGv (ORCPT ); Tue, 25 Aug 2015 03:06:51 -0400 Received: from bby1mta03.pmc-sierra.com ([216.241.235.118]:60759 "EHLO bby1mta03.pmc-sierra.bc.ca" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750768AbbHYHGv convert rfc822-to-8bit (ORCPT ); Tue, 25 Aug 2015 03:06:51 -0400 Received: from bby1mta03.pmc-sierra.bc.ca (localhost.pmc-sierra.bc.ca [127.0.0.1]) by localhost (Postfix) with SMTP id B7677107083B; Tue, 25 Aug 2015 00:06:50 -0700 (PDT) Received: from smtp.pmcs.com (bby1cas03.pmc-sierra.internal [216.241.227.144]) (using TLSv1 with cipher AES128-SHA (128/128 bits)) (No client certificate requested) by bby1mta03.pmc-sierra.bc.ca (Postfix) with ESMTP id 96AC810707D3; Tue, 25 Aug 2015 00:06:50 -0700 (PDT) Received: from BBYEXM02.pmc-sierra.internal ([169.254.2.226]) by bby1cas03.pmc-sierra.internal ([fe80::6555:ee5c:e637:a304%16]) with mapi id 14.03.0123.003; Tue, 25 Aug 2015 00:06:50 -0700 From: Murthy Bhat To: Karthikeya Sunkesula , Mahesh Rajashekhara , Tomas Henzl , "JBottomley@Parallels.com" , "linux-scsi@vger.kernel.org" CC: "aacraid@pmc-sierra.com" , Harry Yang , Rich Bono Subject: RE: [PATCH V6 04/10] [SCSI] aacraid: Enable 64-bit write to controller register Thread-Topic: [PATCH V6 04/10] [SCSI] aacraid: Enable 64-bit write to controller register Thread-Index: AQHQ0/rWb4drbzNhEU2qU0cvboOlNJ4cVkGwgAAK+OA= Date: Tue, 25 Aug 2015 07:06:50 +0000 Message-ID: <13272BDD18A5F44CB23C497D29A37252DAB0F7A5@BBYEXM02.pmc-sierra.internal> References: <1439272701-15344-1-git-send-email-Mahesh.Rajashekhara@pmcs.com> <1439272701-15344-5-git-send-email-Mahesh.Rajashekhara@pmcs.com> In-Reply-To: Accept-Language: en-US, en-CA Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [216.241.227.4] MIME-Version: 1.0 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=pmcs.com; h=from:to:cc:subject:date:message-id:references:in-reply-to:content-type:content-transfer-encoding:mime-version; s=default; bh=OkynAtkTownuhrQebmomLB21ayp1V6CvQcmqq1Cll4I=; b=nyF9lTJfuwd5AGQyxhRYBgsbj255gRw7RZCLKk7eanaeRXPbLjlJ1isENW5TGEsMaHHtGaO59Mj9gQYey/4McmGcmPYgiGWpLuaCDM9XwQNqU1xDaInvpF6tEvHFzysO0s646T1koMtZLcyVr5qZGbWiWzOVcZ8H+HPlpLeJ9mg= Sender: linux-scsi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org X-Spam-Status: No, score=-8.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Reviewed-by: Murthy Bhat -----Original Message----- From: Karthikeya Sunkesula Sent: Tuesday, August 25, 2015 11:58 AM To: Mahesh Rajashekhara; Tomas Henzl; JBottomley@Parallels.com; linux-scsi@vger.kernel.org Cc: aacraid@pmc-sierra.com; Harry Yang; Rich Bono; Murthy Bhat Subject: RE: [PATCH V6 04/10] [SCSI] aacraid: Enable 64-bit write to controller register Reviewed-by: Karthikeya Sunkesula -----Original Message----- From: Mahesh Rajashekhara Sent: Tuesday, August 11, 2015 11:28 AM To: Tomas Henzl; JBottomley@Parallels.com; linux-scsi@vger.kernel.org Cc: aacraid@pmc-sierra.com; Harry Yang; Rich Bono; Mahesh Rajashekhara Subject: [PATCH V6 04/10] [SCSI] aacraid: Enable 64-bit write to controller register Description: If writeq() not supported, then do atomic two 32bit write Changes from V2: None Signed-off-by: Mahesh Rajashekhara --- drivers/scsi/aacraid/aacraid.h | 9 +++++++++ drivers/scsi/aacraid/comminit.c | 1 + drivers/scsi/aacraid/src.c | 12 ++++++++++-- 3 files changed, 20 insertions(+), 2 deletions(-) -- To unsubscribe from this list: send the line "unsubscribe linux-scsi" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/scsi/aacraid/aacraid.h b/drivers/scsi/aacraid/aacraid.h index 62b0999..e54f597 100644 --- a/drivers/scsi/aacraid/aacraid.h +++ b/drivers/scsi/aacraid/aacraid.h @@ -844,6 +844,10 @@ struct src_registers { &((AEP)->regs.src.bar0->CSR)) #define src_writel(AEP, CSR, value) writel(value, \ &((AEP)->regs.src.bar0->CSR)) +#if defined(writeq) +#define src_writeq(AEP, CSR, value) writeq(value, \ + &((AEP)->regs.src.bar0->CSR)) +#endif #define SRC_ODR_SHIFT 12 #define SRC_IDR_SHIFT 9 @@ -1163,6 +1167,11 @@ struct aac_dev struct fsa_dev_info *fsa_dev; struct task_struct *thread; int cardtype; + /* + *This lock will protect the two 32-bit + *writes to the Inbound Queue + */ + spinlock_t iq_lock; /* * The following is the device specific extension. diff --git a/drivers/scsi/aacraid/comminit.c b/drivers/scsi/aacraid/comminit.c index 45a0a04..b4b6088 100644 --- a/drivers/scsi/aacraid/comminit.c +++ b/drivers/scsi/aacraid/comminit.c @@ -424,6 +424,7 @@ struct aac_dev *aac_init_adapter(struct aac_dev *dev) dev->management_fib_count = 0; spin_lock_init(&dev->manage_lock); spin_lock_init(&dev->sync_lock); + spin_lock_init(&dev->iq_lock); dev->max_fib_size = sizeof(struct hw_fib); dev->sg_tablesize = host->sg_tablesize = (dev->max_fib_size - sizeof(struct aac_fibhdr) diff --git a/drivers/scsi/aacraid/src.c b/drivers/scsi/aacraid/src.c index eb07b3d..1409a0b 100644 --- a/drivers/scsi/aacraid/src.c +++ b/drivers/scsi/aacraid/src.c @@ -447,6 +447,10 @@ static int aac_src_deliver_message(struct fib *fib) u32 fibsize; dma_addr_t address; struct aac_fib_xporthdr *pFibX; +#if !defined(writeq) + unsigned long flags; +#endif + u16 hdr_size = le16_to_cpu(fib->hw_fib_va->header.Size); atomic_inc(&q->numpending); @@ -511,10 +515,14 @@ static int aac_src_deliver_message(struct fib *fib) return -EINVAL; address |= fibsize; } - +#if defined(writeq) + src_writeq(dev, MUnit.IQ_L, (u64)address); #else + spin_lock_irqsave(&fib->dev->iq_lock, flags); src_writel(dev, MUnit.IQ_H, upper_32_bits(address) & 0xffffffff); src_writel(dev, MUnit.IQ_L, address & 0xffffffff); - + spin_unlock_irqrestore(&fib->dev->iq_lock, flags); #endif return 0; } -- 1.9.3