From patchwork Mon Nov 9 05:26:22 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alim Akhtar X-Patchwork-Id: 7581021 Return-Path: X-Original-To: patchwork-linux-scsi@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 2E4FBC05C6 for ; Mon, 9 Nov 2015 05:29:48 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 2A029204B0 for ; Mon, 9 Nov 2015 05:29:47 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 10CF220453 for ; Mon, 9 Nov 2015 05:29:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751648AbbKIF3c (ORCPT ); Mon, 9 Nov 2015 00:29:32 -0500 Received: from mailout3.samsung.com ([203.254.224.33]:44473 "EHLO mailout3.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751419AbbKIF3a (ORCPT ); Mon, 9 Nov 2015 00:29:30 -0500 Received: from epcpsbgr5.samsung.com (u145.gpu120.samsung.co.kr [203.254.230.145]) by mailout3.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTP id <0NXJ0357R8L4HM90@mailout3.samsung.com>; Mon, 09 Nov 2015 14:29:28 +0900 (KST) Received: from epcpsbgm2new.samsung.com ( [172.20.52.122]) by epcpsbgr5.samsung.com (EPCPMTA) with SMTP id 9A.5D.05385.83F20465; Mon, 9 Nov 2015 14:29:28 +0900 (KST) X-AuditID: cbfee691-f79d66d000001509-a3-56402f387644 Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm2new.samsung.com (EPCPMTA) with SMTP id D0.99.18629.83F20465; Mon, 9 Nov 2015 14:29:28 +0900 (KST) Received: from exypnos.sisodomain.com ([107.108.73.28]) by mmp1.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0NXJ002ZM8DXYXP0@mmp1.samsung.com>; Mon, 09 Nov 2015 14:29:28 +0900 (KST) From: Alim Akhtar To: linux-scsi@vger.kernel.org, linux-kernel@vger.kernel.org Cc: JBottomley@odin.com, vinholikatti@gmail.com, gautam.vivek@samsung.com, essuuj@gmail.com, devicetree@vger.kernel.org, kishon@ti.com Subject: [PATCH v5 06/11] scsi: ufs: add quirk to enable host controller without hce Date: Mon, 09 Nov 2015 10:56:22 +0530 Message-id: <1447046787-480-7-git-send-email-alim.akhtar@samsung.com> X-Mailer: git-send-email 1.7.10.4 In-reply-to: <1447046787-480-1-git-send-email-alim.akhtar@samsung.com> References: <1447046787-480-1-git-send-email-alim.akhtar@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrPLMWRmVeSWpSXmKPExsWyRsSkStdC3yHMoHmnpsX8I+dYLZZfWMJk 0XblILvF//W3WSwuPO1hs7i8aw6bRff1HWwWOxZWOXB47Jx1l93j8I8fzB59W1Yxehy/sZ3J 4/MmuQDWKC6blNSczLLUIn27BK6Mq9cOMBdMl63YffU4YwPjAfEuRk4OCQETiW+Hv7BD2GIS F+6tZ+ti5OIQEljBKPH6/k5GmKLFB5+zgNhCAksZJWas14GwfzJKPF9mA2KzCWhL3J2+hQnE FhGwkTh/8wETyCBmgQ5Gic5zW9hAEsICYRKbn51jBbFZBFQlDlzoB7N5BVwlGr78h7pCUaL7 2QSwek4BN4lzMxuYIZa5SnS9PskCMlRCYBG7xNl9P9khBglIfJt8CCjBAZSQldh0gBlijqTE wRU3WCYwCi9gZFjFKJpakFxQnJReZKpXnJhbXJqXrpecn7uJERjup/89m7iD8f4B60OMAhyM Sjy8ETPtw4RYE8uKK3MPMZoCbZjILCWanA+MqrySeENjMyMLUxNTYyNzSzMlcV4d6Z/BQgLp iSWp2ampBalF8UWlOanFhxiZODilGhgrdco9zoVPnxVp2Z7+TWqLTc/UxyZLjr1ftjL0jECI waf6Zv4cb8tlhc9nXrkeuvx5+KXoZj8utfdT1m5xfLPG2MnX+JV/6eLt/bIWXkdP/5Tvm869 1/xgi+hJGZ4n/Oxaa/6X8wrHffU5XqSw/HvAn0u2B1IuTAvyTlxqfGvx9VcWcYtSl1spsRRn JBpqMRcVJwIAx51IwXICAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrDIsWRmVeSWpSXmKPExsVy+t9jAV0LfYcwg2sv5C3mHznHarH8whIm i7YrB9kt/q+/zWJx4WkPm8XlXXPYLLqv72Cz2LGwyoHDY+esu+weh3/8YPbo27KK0eP4je1M Hp83yQWwRjUw2mSkJqakFimk5iXnp2TmpdsqeQfHO8ebmhkY6hpaWpgrKeQl5qbaKrn4BOi6 ZeYA3aKkUJaYUwoUCkgsLlbSt8M0ITTETdcCpjFC1zckCK7HyAANJKxhzLh67QBzwXTZit1X jzM2MB4Q72Lk5JAQMJFYfPA5C4QtJnHh3no2EFtIYCmjxIz1OhD2T0aJ58tsQGw2AW2Ju9O3 MIHYIgI2EudvPgCyuTiYBToYJTrPbQFrFhYIk9j87BwriM0ioCpx4EI/mM0r4CrR8OU/O8Qy RYnuZxPA6jkF3CTOzWxghljmKtH1+iTLBEbeBYwMqxglUguSC4qT0nON8lLL9YoTc4tL89L1 kvNzNzGCY+qZ9A7Gw7vcDzEKcDAq8fAyTLcPE2JNLCuuzD3EKMHBrCTCa8bmECbEm5JYWZVa lB9fVJqTWnyI0RTosInMUqLJ+cB4zyuJNzQ2MTc1NrU0sTAxs1QS59X3NAoTEkhPLEnNTk0t SC2C6WPi4JRqYKwut9zLf9auXvFHxLkrfpPeVyUUF6a9mnlG6i2vDc+vqcKzVjSxPFA9MYPz qbDezVzBZ5/XnlfcIHQkVcAxikXNaMU/D1btU38Kio3D3Arn5LmXPue+EyD6ZavdpHsRG864 JC+brPzs8sGF65e5MH4QKtju3HFTYsr1hpURJ3y27ClOW71FwUCJpTgj0VCLuag4EQDb0XHo vwIAAA== DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Sender: linux-scsi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org X-Spam-Status: No, score=-7.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Seungwon Jeon Some host controller doesn't support host controller enable via HCE. Signed-off-by: Seungwon Jeon Signed-off-by: Alim Akhtar --- drivers/scsi/ufs/ufshcd.c | 75 +++++++++++++++++++++++++++++++++++++++++++-- drivers/scsi/ufs/ufshcd.h | 5 +++ 2 files changed, 78 insertions(+), 2 deletions(-) diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c index ca7483cd899e..e8b96ec65987 100644 --- a/drivers/scsi/ufs/ufshcd.c +++ b/drivers/scsi/ufs/ufshcd.c @@ -2107,6 +2107,52 @@ static int ufshcd_dme_link_startup(struct ufs_hba *hba) "dme-link-startup: error code %d\n", ret); return ret; } +/** + * ufshcd_dme_reset - UIC command for DME_RESET + * @hba: per adapter instance + * + * DME_RESET command is issued in order to reset UniPro stack. + * This function now deal with cold reset. + * + * Returns 0 on success, non-zero value on failure + */ +static int ufshcd_dme_reset(struct ufs_hba *hba) +{ + struct uic_command uic_cmd = {0}; + int ret; + + uic_cmd.command = UIC_CMD_DME_RESET; + + ret = ufshcd_send_uic_cmd(hba, &uic_cmd); + if (ret) + dev_err(hba->dev, + "dme-reset: error code %d\n", ret); + + return ret; +} + +/** + * ufshcd_dme_enable - UIC command for DME_ENABLE + * @hba: per adapter instance + * + * DME_ENABLE command is issued in order to enable UniPro stack. + * + * Returns 0 on success, non-zero value on failure + */ +static int ufshcd_dme_enable(struct ufs_hba *hba) +{ + struct uic_command uic_cmd = {0}; + int ret; + + uic_cmd.command = UIC_CMD_DME_ENABLE; + + ret = ufshcd_send_uic_cmd(hba, &uic_cmd); + if (ret) + dev_err(hba->dev, + "dme-reset: error code %d\n", ret); + + return ret; +} static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba) { @@ -2642,7 +2688,7 @@ out: } /** - * ufshcd_hba_enable - initialize the controller + * ufshcd_hba_execute_hce - initialize the controller * @hba: per adapter instance * * The controller resets itself and controller firmware initialization @@ -2651,7 +2697,7 @@ out: * * Returns 0 on success, non-zero value on failure */ -static int ufshcd_hba_enable(struct ufs_hba *hba) +static int ufshcd_hba_execute_hce(struct ufs_hba *hba) { int retry; @@ -2715,6 +2761,31 @@ static int ufshcd_hba_enable(struct ufs_hba *hba) return 0; } +static int ufshcd_hba_enable(struct ufs_hba *hba) +{ + int ret; + + if (hba->quirks & UFSHCI_QUIRK_BROKEN_HCE) { + ufshcd_set_link_off(hba); + ufshcd_vops_hce_enable_notify(hba, PRE_CHANGE); + + /* enable UIC related interrupts */ + ufshcd_enable_intr(hba, UFSHCD_UIC_MASK); + ret = ufshcd_dme_reset(hba); + if (!ret) { + ret = ufshcd_dme_enable(hba); + if (!ret) + ufshcd_vops_hce_enable_notify(hba, POST_CHANGE); + if (ret) + dev_err(hba->dev, + "Host controller enable failed with non-hce\n"); + } + } else { + ret = ufshcd_hba_execute_hce(hba); + } + + return ret; +} static int ufshcd_disable_tx_lcc(struct ufs_hba *hba, bool peer) { int tx_lanes, i, err = 0; diff --git a/drivers/scsi/ufs/ufshcd.h b/drivers/scsi/ufs/ufshcd.h index 4ae32e9316de..500e137bf68a 100644 --- a/drivers/scsi/ufs/ufshcd.h +++ b/drivers/scsi/ufs/ufshcd.h @@ -485,6 +485,11 @@ struct ufs_hba { */ #define UFSHCI_QUIRK_SKIP_RESET_INTR_AGGR UFS_BIT(8) + /* + * This quirks needs to be enabled if host controller cannot be + * enabled via HCE register. + */ + #define UFSHCI_QUIRK_BROKEN_HCE UFS_BIT(9) unsigned int quirks; /* Deviations from standard UFSHCI spec. */ wait_queue_head_t tm_wq;