From patchwork Fri Aug 19 09:50:10 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jitendra Bhivare X-Patchwork-Id: 9289923 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 08731607FF for ; Fri, 19 Aug 2016 09:51:36 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id EDAB5292FF for ; Fri, 19 Aug 2016 09:51:35 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E2B0A29379; Fri, 19 Aug 2016 09:51:35 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 29181292FF for ; Fri, 19 Aug 2016 09:51:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754298AbcHSJv1 (ORCPT ); Fri, 19 Aug 2016 05:51:27 -0400 Received: from mail-wm0-f42.google.com ([74.125.82.42]:36990 "EHLO mail-wm0-f42.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754274AbcHSJvZ (ORCPT ); Fri, 19 Aug 2016 05:51:25 -0400 Received: by mail-wm0-f42.google.com with SMTP id i5so32738318wmg.0 for ; Fri, 19 Aug 2016 02:51:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=sSd1OL7WTWDJPj8uu9RA6oEjordIcqOFVPOZ1zLmtNc=; b=fzljAcFIg+MXPqnyoAuMbZiV3M6g67azgZzWTcvNQBUfELDRJ1nv2B7r3Pt/hBPS9y 5dP122ewtBwkOhx3HwISoRc45O8JJrV+ypGgJ3sYuNSQ3MJP4NxP2U/MZ49u+bdIfaL3 oAJhwyFHkjDJvAbY7AHBwogwLqdGTSpSEsKdU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=sSd1OL7WTWDJPj8uu9RA6oEjordIcqOFVPOZ1zLmtNc=; b=AI8tP6+LCJbRKTJ2sFqBmUHRyygcb0jd3z4n3Dj2jL7vPMLDpX3Rrs/p0+lCMMEx1e px0NTiEFWStciixbet5KFAZDUP9OjTGy0TH6rqzI2//mE2zsA9n4yztP6peFj7Yzl421 t/4LpdLL4Q/LSaOiVClXtPjZKF/+grvOFVMwJZq88YU0m3pI/u1C2DSMaSWSAFGjEoTW ICZsDOkWitOMUKaTSmHAzdCvM5skagRH7CyD0HNv4wg5T3JNo9QSWaGiR+Wn+pkzBOHL 3QyAjK3U9FRYMFmv2/krr92yj7UiDhlQNxmZkE8T4JMe9+k2t/bM8+AhQKTV6RCHzLT0 YTMA== X-Gm-Message-State: AEkooutow7m/bZBwsOUnikNj3SRXtM4N9TJtMQIthfgihKpHTDi5GYDtDUdNTuhnT9Atjy6E X-Received: by 10.194.149.133 with SMTP id ua5mr5604401wjb.79.1471600284099; Fri, 19 Aug 2016 02:51:24 -0700 (PDT) Received: from android.dhcp.avagotech.net ([192.19.239.250]) by smtp.gmail.com with ESMTPSA id n131sm3650096wmd.3.2016.08.19.02.51.21 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 19 Aug 2016 02:51:23 -0700 (PDT) From: Jitendra Bhivare To: linux-scsi@vger.kernel.org Cc: mchristi@redhat.com, Jitendra Bhivare Subject: [PATCH v2 13/29] be2iscsi: Remove isr_lock and dead code Date: Fri, 19 Aug 2016 15:20:10 +0530 Message-Id: <1471600226-22055-14-git-send-email-jitendra.bhivare@broadcom.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1471600226-22055-1-git-send-email-jitendra.bhivare@broadcom.com> References: <1471600226-22055-1-git-send-email-jitendra.bhivare@broadcom.com> Sender: linux-scsi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP todo_mcc_cq is not needed as only MCC work is queued. todo_cq is not used at all. Rename functions to be consistent. Signed-off-by: Jitendra Bhivare Reviewed-by: Hannes Reinecke --- drivers/scsi/be2iscsi/be.h | 2 +- drivers/scsi/be2iscsi/be_main.c | 132 +++++++++++++++------------------------- drivers/scsi/be2iscsi/be_main.h | 2 - 3 files changed, 49 insertions(+), 87 deletions(-) diff --git a/drivers/scsi/be2iscsi/be.h b/drivers/scsi/be2iscsi/be.h index ee5ace8..621291a 100644 --- a/drivers/scsi/be2iscsi/be.h +++ b/drivers/scsi/be2iscsi/be.h @@ -100,7 +100,7 @@ struct be_eq_obj { struct be_queue_info q; struct beiscsi_hba *phba; struct be_queue_info *cq; - struct work_struct work_cqs; /* Work Item */ + struct work_struct mcc_work; /* Work Item */ struct irq_poll iopoll; }; diff --git a/drivers/scsi/be2iscsi/be_main.c b/drivers/scsi/be2iscsi/be_main.c index 0fbb80d..6179c4e 100644 --- a/drivers/scsi/be2iscsi/be_main.c +++ b/drivers/scsi/be2iscsi/be_main.c @@ -832,12 +832,11 @@ static void hwi_ring_eq_db(struct beiscsi_hba *phba, static irqreturn_t be_isr_mcc(int irq, void *dev_id) { struct beiscsi_hba *phba; - struct be_eq_entry *eqe = NULL; + struct be_eq_entry *eqe; struct be_queue_info *eq; struct be_queue_info *mcc; - unsigned int num_eq_processed; + unsigned int mcc_events; struct be_eq_obj *pbe_eq; - unsigned long flags; pbe_eq = dev_id; eq = &pbe_eq->q; @@ -845,27 +844,23 @@ static irqreturn_t be_isr_mcc(int irq, void *dev_id) mcc = &phba->ctrl.mcc_obj.cq; eqe = queue_tail_node(eq); - num_eq_processed = 0; - + mcc_events = 0; while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32] & EQE_VALID_MASK) { if (((eqe->dw[offsetof(struct amap_eq_entry, resource_id) / 32] & EQE_RESID_MASK) >> 16) == mcc->id) { - spin_lock_irqsave(&phba->isr_lock, flags); - pbe_eq->todo_mcc_cq = true; - spin_unlock_irqrestore(&phba->isr_lock, flags); + mcc_events++; } AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0); queue_tail_inc(eq); eqe = queue_tail_node(eq); - num_eq_processed++; } - if (pbe_eq->todo_mcc_cq) - queue_work(phba->wq, &pbe_eq->work_cqs); - if (num_eq_processed) - hwi_ring_eq_db(phba, eq->id, 1, num_eq_processed, 1, 1); + if (mcc_events) { + queue_work(phba->wq, &pbe_eq->mcc_work); + hwi_ring_eq_db(phba, eq->id, 1, mcc_events, 1, 1); + } return IRQ_HANDLED; } @@ -884,7 +879,6 @@ static irqreturn_t be_isr_msix(int irq, void *dev_id) eq = &pbe_eq->q; phba = pbe_eq->phba; - /* disable interrupt till iopoll completes */ hwi_ring_eq_db(phba, eq->id, 1, 0, 0, 1); irq_poll_sched(&pbe_eq->iopoll); @@ -902,14 +896,13 @@ static irqreturn_t be_isr(int irq, void *dev_id) struct beiscsi_hba *phba; struct hwi_controller *phwi_ctrlr; struct hwi_context_memory *phwi_context; - struct be_eq_entry *eqe = NULL; + struct be_eq_entry *eqe; struct be_queue_info *eq; struct be_queue_info *mcc; - unsigned long flags, index; - unsigned int num_mcceq_processed, num_ioeq_processed; + unsigned int mcc_events, io_events; struct be_ctrl_info *ctrl; struct be_eq_obj *pbe_eq; - int isr; + int isr, rearm; phba = dev_id; ctrl = &phba->ctrl; @@ -924,44 +917,35 @@ static irqreturn_t be_isr(int irq, void *dev_id) eq = &phwi_context->be_eq[0].q; mcc = &phba->ctrl.mcc_obj.cq; - index = 0; eqe = queue_tail_node(eq); - num_ioeq_processed = 0; - num_mcceq_processed = 0; + io_events = 0; + mcc_events = 0; while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32] & EQE_VALID_MASK) { if (((eqe->dw[offsetof(struct amap_eq_entry, - resource_id) / 32] & - EQE_RESID_MASK) >> 16) == mcc->id) { - spin_lock_irqsave(&phba->isr_lock, flags); - pbe_eq->todo_mcc_cq = true; - spin_unlock_irqrestore(&phba->isr_lock, flags); - num_mcceq_processed++; - } else { - irq_poll_sched(&pbe_eq->iopoll); - num_ioeq_processed++; - } + resource_id) / 32] & EQE_RESID_MASK) >> 16) == mcc->id) + mcc_events++; + else + io_events++; AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0); queue_tail_inc(eq); eqe = queue_tail_node(eq); } - if (num_ioeq_processed || num_mcceq_processed) { - if (pbe_eq->todo_mcc_cq) - queue_work(phba->wq, &pbe_eq->work_cqs); - - if ((num_mcceq_processed) && (!num_ioeq_processed)) - hwi_ring_eq_db(phba, eq->id, 0, - (num_ioeq_processed + - num_mcceq_processed) , 1, 1); - else - hwi_ring_eq_db(phba, eq->id, 0, - (num_ioeq_processed + - num_mcceq_processed), 0, 1); - - return IRQ_HANDLED; - } else + if (!io_events && !mcc_events) return IRQ_NONE; + + /* no need to rearm if interrupt is only for IOs */ + rearm = 0; + if (mcc_events) { + queue_work(phba->wq, &pbe_eq->mcc_work); + /* rearm for MCCQ */ + rearm = 1; + } + if (io_events) + irq_poll_sched(&pbe_eq->iopoll); + hwi_ring_eq_db(phba, eq->id, 0, (io_events + mcc_events), rearm, 1); + return IRQ_HANDLED; } @@ -2055,6 +2039,18 @@ void beiscsi_process_mcc_cq(struct beiscsi_hba *phba) hwi_ring_cq_db(phba, mcc_cq->id, num_processed, 1); } +static void beiscsi_mcc_work(struct work_struct *work) +{ + struct be_eq_obj *pbe_eq; + struct beiscsi_hba *phba; + + pbe_eq = container_of(work, struct be_eq_obj, mcc_work); + phba = pbe_eq->phba; + beiscsi_process_mcc_cq(phba); + /* rearm EQ for further interrupts */ + hwi_ring_eq_db(phba, pbe_eq->q.id, 0, 0, 1, 1); +} + /** * beiscsi_process_cq()- Process the Completion Queue * @pbe_eq: Event Q on which the Completion has come @@ -2244,46 +2240,15 @@ proc_next_cqe: return total; } -void beiscsi_process_all_cqs(struct work_struct *work) -{ - unsigned long flags; - struct hwi_controller *phwi_ctrlr; - struct hwi_context_memory *phwi_context; - struct beiscsi_hba *phba; - struct be_eq_obj *pbe_eq = - container_of(work, struct be_eq_obj, work_cqs); - - phba = pbe_eq->phba; - phwi_ctrlr = phba->phwi_ctrlr; - phwi_context = phwi_ctrlr->phwi_ctxt; - - if (pbe_eq->todo_mcc_cq) { - spin_lock_irqsave(&phba->isr_lock, flags); - pbe_eq->todo_mcc_cq = false; - spin_unlock_irqrestore(&phba->isr_lock, flags); - beiscsi_process_mcc_cq(phba); - } - - if (pbe_eq->todo_cq) { - spin_lock_irqsave(&phba->isr_lock, flags); - pbe_eq->todo_cq = false; - spin_unlock_irqrestore(&phba->isr_lock, flags); - beiscsi_process_cq(pbe_eq, BE2_MAX_NUM_CQ_PROC); - } - - /* rearm EQ for further interrupts */ - hwi_ring_eq_db(phba, pbe_eq->q.id, 0, 0, 1, 1); -} - static int be_iopoll(struct irq_poll *iop, int budget) { - unsigned int ret, num_eq_processed; + unsigned int ret, io_events; struct beiscsi_hba *phba; struct be_eq_obj *pbe_eq; struct be_eq_entry *eqe = NULL; struct be_queue_info *eq; - num_eq_processed = 0; + io_events = 0; pbe_eq = container_of(iop, struct be_eq_obj, iopoll); phba = pbe_eq->phba; eq = &pbe_eq->q; @@ -2294,10 +2259,10 @@ static int be_iopoll(struct irq_poll *iop, int budget) AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0); queue_tail_inc(eq); eqe = queue_tail_node(eq); - num_eq_processed++; + io_events++; } - hwi_ring_eq_db(phba, eq->id, 1, num_eq_processed, 0, 1); + hwi_ring_eq_db(phba, eq->id, 1, io_events, 0, 1); ret = beiscsi_process_cq(pbe_eq, budget); pbe_eq->cq_count += ret; @@ -5578,7 +5543,7 @@ static void beiscsi_eeh_resume(struct pci_dev *pdev) i = (phba->msix_enabled) ? i : 0; /* Work item for MCC handling */ pbe_eq = &phwi_context->be_eq[i]; - INIT_WORK(&pbe_eq->work_cqs, beiscsi_process_all_cqs); + INIT_WORK(&pbe_eq->mcc_work, beiscsi_mcc_work); ret = beiscsi_init_irqs(phba); if (ret < 0) { @@ -5682,7 +5647,6 @@ static int beiscsi_dev_probe(struct pci_dev *pcidev, spin_lock_init(&phba->io_sgl_lock); spin_lock_init(&phba->mgmt_sgl_lock); - spin_lock_init(&phba->isr_lock); spin_lock_init(&phba->async_pdu_lock); ret = mgmt_get_fw_config(&phba->ctrl, phba); if (ret != 0) { @@ -5754,7 +5718,7 @@ static int beiscsi_dev_probe(struct pci_dev *pcidev, i = (phba->msix_enabled) ? i : 0; /* Work item for MCC handling */ pbe_eq = &phwi_context->be_eq[i]; - INIT_WORK(&pbe_eq->work_cqs, beiscsi_process_all_cqs); + INIT_WORK(&pbe_eq->mcc_work, beiscsi_mcc_work); ret = beiscsi_init_irqs(phba); if (ret < 0) { diff --git a/drivers/scsi/be2iscsi/be_main.h b/drivers/scsi/be2iscsi/be_main.h index 30a4606..90cdc10 100644 --- a/drivers/scsi/be2iscsi/be_main.h +++ b/drivers/scsi/be2iscsi/be_main.h @@ -378,7 +378,6 @@ struct beiscsi_hba { struct sgl_handle **eh_sgl_hndl_base; spinlock_t io_sgl_lock; spinlock_t mgmt_sgl_lock; - spinlock_t isr_lock; spinlock_t async_pdu_lock; unsigned int age; struct list_head hba_queue; @@ -845,7 +844,6 @@ struct wrb_handle *alloc_wrb_handle(struct beiscsi_hba *phba, unsigned int cid, void free_mgmt_sgl_handle(struct beiscsi_hba *phba, struct sgl_handle *psgl_handle); -void beiscsi_process_all_cqs(struct work_struct *work); void beiscsi_free_mgmt_task_handles(struct beiscsi_conn *beiscsi_conn, struct iscsi_task *task);