From patchwork Tue Oct 18 04:49:05 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vivek Gautam X-Patchwork-Id: 9381279 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 7167060CF5 for ; Tue, 18 Oct 2016 04:50:56 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6281A291F6 for ; Tue, 18 Oct 2016 04:50:56 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 573C929208; Tue, 18 Oct 2016 04:50:56 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D8277291F6 for ; Tue, 18 Oct 2016 04:50:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757692AbcJREus (ORCPT ); Tue, 18 Oct 2016 00:50:48 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:36182 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932549AbcJREtn (ORCPT ); Tue, 18 Oct 2016 00:49:43 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id A3508617FE; Tue, 18 Oct 2016 04:49:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1476766181; bh=ltEwRC6amsoWE16N5fbH9DB7hxJRW8wnrji62YpQ1EM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Ca9t67qbXU/L0LCdDeMzH81EaNh4AunhtkOT1QoeAuWl8DbV3WZPo2tn7C1bmsgJ9 xTSMYlM3p51IzvCbq36bFJU8WRjc/5kRgY3NPjZWUa37WgFRuJKspLqAHRSCcaOVpJ QO/n7MaYJyj5CZtNUju6qFVe78BRn53nLHo4VBbo= Received: from blr-ubuntu-41.ap.qualcomm.com (unknown [202.46.23.61]) (using TLSv1.1 with cipher ECDHE-RSA-AES128-SHA (128/128 bits)) (No client certificate requested) (Authenticated sender: vivek.gautam@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id CB8EE61818; Tue, 18 Oct 2016 04:49:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1476766181; bh=ltEwRC6amsoWE16N5fbH9DB7hxJRW8wnrji62YpQ1EM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Ca9t67qbXU/L0LCdDeMzH81EaNh4AunhtkOT1QoeAuWl8DbV3WZPo2tn7C1bmsgJ9 xTSMYlM3p51IzvCbq36bFJU8WRjc/5kRgY3NPjZWUa37WgFRuJKspLqAHRSCcaOVpJ QO/n7MaYJyj5CZtNUju6qFVe78BRn53nLHo4VBbo= DMARC-Filter: OpenDMARC Filter v1.3.1 smtp.codeaurora.org CB8EE61818 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=pass smtp.mailfrom=vivek.gautam@codeaurora.org From: Vivek Gautam To: kishon@ti.com, jejb@linux.vnet.ibm.com, vinholikatti@gmail.com, martin.petersen@oracle.com, linux-kernel@vger.kernel.org Cc: subhashj@codeaurora.org, linux-scsi@vger.kernel.org, linux-arm-msm@vger.kernel.org, Vivek Gautam Subject: [PATCH 7/7] ufs-qcom: phy/hcd: Refactoring phy clock handling Date: Tue, 18 Oct 2016 10:19:05 +0530 Message-Id: <1476766145-27583-8-git-send-email-vivek.gautam@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1476766145-27583-1-git-send-email-vivek.gautam@codeaurora.org> References: <1476766145-27583-1-git-send-email-vivek.gautam@codeaurora.org> Sender: linux-scsi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add phy clock enable code to phy_power_on/off callbacks, and remove explicit calls to enable these phy clocks from the ufs-qcom hcd driver. Signed-off-by: Vivek Gautam Reviewed-by: Subhash Jadavani --- drivers/phy/phy-qcom-ufs.c | 12 +++++++++++- drivers/scsi/ufs/ufs-qcom.c | 15 --------------- 2 files changed, 11 insertions(+), 16 deletions(-) diff --git a/drivers/phy/phy-qcom-ufs.c b/drivers/phy/phy-qcom-ufs.c index 3a87e88..687b9b7 100644 --- a/drivers/phy/phy-qcom-ufs.c +++ b/drivers/phy/phy-qcom-ufs.c @@ -681,11 +681,18 @@ int ufs_qcom_phy_power_on(struct phy *generic_phy) goto out_disable_phy; } + err = ufs_qcom_phy_enable_iface_clk(generic_phy); + if (err) { + dev_err(dev, "%s enable phy iface clock failed, err=%d\n", + __func__, err); + goto out_disable_pll; + } + err = ufs_qcom_phy_enable_ref_clk(generic_phy); if (err) { dev_err(dev, "%s enable phy ref clock failed, err=%d\n", __func__, err); - goto out_disable_pll; + goto out_disable_iface_clk; } /* enable device PHY ref_clk pad rail */ @@ -704,6 +711,8 @@ int ufs_qcom_phy_power_on(struct phy *generic_phy) out_disable_ref_clk: ufs_qcom_phy_disable_ref_clk(generic_phy); +out_disable_iface_clk: + ufs_qcom_phy_disable_iface_clk(generic_phy); out_disable_pll: ufs_qcom_phy_disable_vreg(dev, &phy_common->vdda_pll); out_disable_phy: @@ -723,6 +732,7 @@ int ufs_qcom_phy_power_off(struct phy *generic_phy) ufs_qcom_phy_disable_vreg(phy_common->dev, &phy_common->vddp_ref_clk); ufs_qcom_phy_disable_ref_clk(generic_phy); + ufs_qcom_phy_disable_iface_clk(generic_phy); ufs_qcom_phy_disable_vreg(phy_common->dev, &phy_common->vdda_pll); ufs_qcom_phy_disable_vreg(phy_common->dev, &phy_common->vdda_phy); diff --git a/drivers/scsi/ufs/ufs-qcom.c b/drivers/scsi/ufs/ufs-qcom.c index 3aedf73..6e4ce5f 100644 --- a/drivers/scsi/ufs/ufs-qcom.c +++ b/drivers/scsi/ufs/ufs-qcom.c @@ -1112,17 +1112,6 @@ static int ufs_qcom_setup_clocks(struct ufs_hba *hba, bool on) return 0; if (on) { - err = ufs_qcom_phy_enable_iface_clk(host->generic_phy); - if (err) - goto out; - - err = ufs_qcom_phy_enable_ref_clk(host->generic_phy); - if (err) { - dev_err(hba->dev, "%s enable phy ref clock failed, err=%d\n", - __func__, err); - ufs_qcom_phy_disable_iface_clk(host->generic_phy); - goto out; - } /* enable the device ref clock for HS mode*/ if (ufshcd_is_hs_mode(&hba->pwr_info)) ufs_qcom_dev_ref_clk_ctrl(host, true); @@ -1131,9 +1120,6 @@ static int ufs_qcom_setup_clocks(struct ufs_hba *hba, bool on) ufs_qcom_update_bus_bw_vote(host); } else { - - /* M-PHY RMMI interface clocks can be turned off */ - ufs_qcom_phy_disable_iface_clk(host->generic_phy); if (!ufs_qcom_is_link_active(hba)) /* disable device ref_clk */ ufs_qcom_dev_ref_clk_ctrl(host, false); @@ -1146,7 +1132,6 @@ static int ufs_qcom_setup_clocks(struct ufs_hba *hba, bool on) dev_err(hba->dev, "%s: set bus vote failed %d\n", __func__, err); -out: return err; }