From patchwork Tue Mar 14 08:01:30 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jitendra Bhivare X-Patchwork-Id: 9622655 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 8DD0360244 for ; Tue, 14 Mar 2017 08:02:13 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7D7212808F for ; Tue, 14 Mar 2017 08:02:13 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 724FD2811C; Tue, 14 Mar 2017 08:02:13 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id CAFF52808F for ; Tue, 14 Mar 2017 08:02:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1750936AbdCNICN (ORCPT ); Tue, 14 Mar 2017 04:02:13 -0400 Received: from mail-wr0-f174.google.com ([209.85.128.174]:34348 "EHLO mail-wr0-f174.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750842AbdCNICM (ORCPT ); Tue, 14 Mar 2017 04:02:12 -0400 Received: by mail-wr0-f174.google.com with SMTP id l37so118400919wrc.1 for ; Tue, 14 Mar 2017 01:02:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=S7vhEZBl0RCR+cl1youqbGPEX8qr3BLkDE7CkzR3nZc=; b=XUHONoE4oSExKfGspz0MLbYx9QHBnlAaK7WyIYby8mKT8cGPJiG6LL8eyLSSoGBBFs edkQppfrpj9Dj4D+0j2RlE/McsRwqZO21WJj7n1YRx5/Q+DVSQmW1y5hOS5RqB4N2lQv gKpVlhXOfencyBYViA/zKgCu8I8/YubPeUomw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=S7vhEZBl0RCR+cl1youqbGPEX8qr3BLkDE7CkzR3nZc=; b=mBbQnHrqr1TY61OLaGXzBCYEEIPJpNWGVV6kM5eptcdkcR6Z9pnYbVkNkyrrNI/3NR 0+xY8ku564pZI0kLdH/bPFs+LHj33NkHI02h8n9Y/zrRAT9Gf+GzlM2auG/pfEQHidKv AFJhO1HVXFIUxHEjGY73ka4ATLHrhHye9FSII0BLEHqSzSniYnXL/U4p58PB9d34cCyo SUT7hiDfVaQ1CDVQl4Rek/J2V1nDowWvDU7cd9bRQRb8jMEMncTtqtuBJoRHUjz/ZiGw CSBO6cwD13vjQ3u10V4q4rQfQp6pDfLFJgq6Vm0ZpZtQ8saUoIa1cADauMVruhVcZqbA mzMw== X-Gm-Message-State: AMke39kScIRBJZC/xrdn1yU5Hca2iXy+be714zDn2sj3nGwFzImATQ5qV+m3Xk1WiDJnpFc6 X-Received: by 10.223.135.215 with SMTP id c23mr30714730wrc.135.1489478529902; Tue, 14 Mar 2017 01:02:09 -0700 (PDT) Received: from android.dhcp.avagotech.net ([192.19.239.250]) by smtp.gmail.com with ESMTPSA id 63sm28112281wrh.68.2017.03.14.01.02.06 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 14 Mar 2017 01:02:09 -0700 (PDT) From: Jitendra Bhivare To: cleech@redhat.com, lduncan@suse.com Cc: linux-scsi@vger.kernel.org, Jitendra Bhivare Subject: [PATCH 5/9] be2iscsi: Increase HDQ default queue size Date: Tue, 14 Mar 2017 13:31:30 +0530 Message-Id: <1489478494-5432-6-git-send-email-jitendra.bhivare@broadcom.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1489478494-5432-1-git-send-email-jitendra.bhivare@broadcom.com> References: <1489478494-5432-1-git-send-email-jitendra.bhivare@broadcom.com> Sender: linux-scsi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Currently, ASYNC PDU default queue size is set to max connections. This leaves only one buffer per connection for any ASYNC PDUs from targets. Double the size of the default queue. Signed-off-by: Jitendra Bhivare --- drivers/scsi/be2iscsi/be_main.c | 29 ++++++++++++++--------------- drivers/scsi/be2iscsi/be_main.h | 4 +++- 2 files changed, 17 insertions(+), 16 deletions(-) diff --git a/drivers/scsi/be2iscsi/be_main.c b/drivers/scsi/be2iscsi/be_main.c index ff48573..b76fd26 100644 --- a/drivers/scsi/be2iscsi/be_main.c +++ b/drivers/scsi/be2iscsi/be_main.c @@ -636,7 +636,6 @@ static void beiscsi_get_params(struct beiscsi_hba *phba) (total_cid_count + BE2_TMFS + BE2_NOPOUT_REQ)); phba->params.cxns_per_ctrl = total_cid_count; - phba->params.asyncpdus_per_ctrl = total_cid_count; phba->params.icds_per_ctrl = total_icd_count; phba->params.num_sge_per_io = BE2_SGE; phba->params.defpdu_hdr_sz = BE2_DEFPDU_HDR_SZ; @@ -2407,22 +2406,22 @@ static void beiscsi_find_mem_req(struct beiscsi_hba *phba) if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) { num_async_pdu_buf_sgl_pages = - PAGES_REQUIRED(BEISCSI_GET_CID_COUNT( + PAGES_REQUIRED(BEISCSI_ASYNC_HDQ_SIZE( phba, ulp_num) * sizeof(struct phys_addr)); num_async_pdu_buf_pages = - PAGES_REQUIRED(BEISCSI_GET_CID_COUNT( + PAGES_REQUIRED(BEISCSI_ASYNC_HDQ_SIZE( phba, ulp_num) * phba->params.defpdu_hdr_sz); num_async_pdu_data_pages = - PAGES_REQUIRED(BEISCSI_GET_CID_COUNT( + PAGES_REQUIRED(BEISCSI_ASYNC_HDQ_SIZE( phba, ulp_num) * phba->params.defpdu_data_sz); num_async_pdu_data_sgl_pages = - PAGES_REQUIRED(BEISCSI_GET_CID_COUNT( + PAGES_REQUIRED(BEISCSI_ASYNC_HDQ_SIZE( phba, ulp_num) * sizeof(struct phys_addr)); @@ -2459,21 +2458,21 @@ static void beiscsi_find_mem_req(struct beiscsi_hba *phba) mem_descr_index = (HWI_MEM_ASYNC_HEADER_HANDLE_ULP0 + (ulp_num * MEM_DESCR_OFFSET)); phba->mem_req[mem_descr_index] = - BEISCSI_GET_CID_COUNT(phba, ulp_num) * - sizeof(struct hd_async_handle); + BEISCSI_ASYNC_HDQ_SIZE(phba, ulp_num) * + sizeof(struct hd_async_handle); mem_descr_index = (HWI_MEM_ASYNC_DATA_HANDLE_ULP0 + (ulp_num * MEM_DESCR_OFFSET)); phba->mem_req[mem_descr_index] = - BEISCSI_GET_CID_COUNT(phba, ulp_num) * - sizeof(struct hd_async_handle); + BEISCSI_ASYNC_HDQ_SIZE(phba, ulp_num) * + sizeof(struct hd_async_handle); mem_descr_index = (HWI_MEM_ASYNC_PDU_CONTEXT_ULP0 + (ulp_num * MEM_DESCR_OFFSET)); phba->mem_req[mem_descr_index] = - sizeof(struct hd_async_context) + - (BEISCSI_GET_CID_COUNT(phba, ulp_num) * - sizeof(struct hd_async_entry)); + sizeof(struct hd_async_context) + + (BEISCSI_ASYNC_HDQ_SIZE(phba, ulp_num) * + sizeof(struct hd_async_entry)); } } } @@ -2757,7 +2756,7 @@ static int hwi_init_async_pdu_ctx(struct beiscsi_hba *phba) ((long unsigned int)pasync_ctx + sizeof(struct hd_async_context)); - pasync_ctx->num_entries = BEISCSI_GET_CID_COUNT(phba, + pasync_ctx->num_entries = BEISCSI_ASYNC_HDQ_SIZE(phba, ulp_num); /* setup header buffers */ mem_descr = (struct be_mem_descriptor *)phba->init_mem; @@ -2895,7 +2894,7 @@ static int hwi_init_async_pdu_ctx(struct beiscsi_hba *phba) phba->params.defpdu_data_sz); num_per_mem = 0; - for (index = 0; index < BEISCSI_GET_CID_COUNT + for (index = 0; index < BEISCSI_ASYNC_HDQ_SIZE (phba, ulp_num); index++) { pasync_header_h->cri = -1; pasync_header_h->is_header = 1; @@ -3772,7 +3771,7 @@ static int hwi_init_port(struct beiscsi_hba *phba) for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) { if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) { def_pdu_ring_sz = - BEISCSI_GET_CID_COUNT(phba, ulp_num) * + BEISCSI_ASYNC_HDQ_SIZE(phba, ulp_num) * sizeof(struct phys_addr); status = beiscsi_create_def_hdr(phba, phwi_context, diff --git a/drivers/scsi/be2iscsi/be_main.h b/drivers/scsi/be2iscsi/be_main.h index 2188579..216f9b4 100644 --- a/drivers/scsi/be2iscsi/be_main.h +++ b/drivers/scsi/be2iscsi/be_main.h @@ -235,7 +235,6 @@ struct sgl_handle { struct hba_parameters { unsigned int ios_per_ctrl; unsigned int cxns_per_ctrl; - unsigned int asyncpdus_per_ctrl; unsigned int icds_per_ctrl; unsigned int num_sge_per_io; unsigned int defpdu_hdr_sz; @@ -599,6 +598,9 @@ struct hd_async_handle { u8 is_final; }; +#define BEISCSI_ASYNC_HDQ_SIZE(phba, ulp) \ + (BEISCSI_GET_CID_COUNT((phba), (ulp)) * 2) + /** * This has list of async PDUs that are waiting to be processed. * Buffers live in this list for a brief duration before they get