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bh=4WgwyAf7iA9bqG9wDUTXFMk00tPpv/Ljootm+ns1ibM=; b=pDAMSaLPMntY9EpSafqlBcCnsmB77c9VObUFvl9gUir7WzR2l3Zz+N6Fdn0djXvQ6R zpINf38h2Xt68UKj4hoXU2HsZJ657XoZUBDzoPuxFhjOgyMA1/hNCBMZDNDA5gPYdGgt zne7kUZ9UJ5c7inZesE/CDHlPKBbVGkYOahqm5xG0F0AgDyP/0lst+oHOtZU1e+r4uvt 2Ns44hGf4pLRw9DxGc4Z+qcVxokJ7A7urKJkVZ0HCcEYUBKt/AtPeiwB+B/oEQmttB6Z /NAdheUsgVFyu8xDFtTVVOtQuZjjTMn33/JJLKRemjvkeXw41+K3XYyn7uw1RUycbxT2 rSGA== X-Gm-Message-State: AMCzsaX0wIbGWOMWWzeQZnlXcmSirRDjiWofrSo4jJKz3wdsvbD2htMY s2LdXqEJdFwkPt0xr/WDx+mTTvoo X-Google-Smtp-Source: ABhQp+R9rMgzvQX7U7l6oaCWSQH+4/Lmc3TwRIes8XThG9CHuHbbGhoECmPrED1hgmV4kq1AlKbooA== X-Received: by 10.237.59.7 with SMTP id p7mr2337448qte.3.1509453221790; Tue, 31 Oct 2017 05:33:41 -0700 (PDT) Received: from host1.dhcp.avagotech.net ([192.19.239.250]) by smtp.gmail.com with ESMTPSA id p31sm790811qtj.12.2017.10.31.05.33.38 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 31 Oct 2017 05:33:41 -0700 (PDT) From: Suganath Prabu S To: linux-scsi@vger.kernel.org Cc: Sathya.Prakash@broadcom.com, linux-kernel@vger.kernel.org, sreekanth.reddy@broadcom.com, linux-nvme@lists.infradead.org, Suganath Prabu S , Chaitra P B Subject: [PATCH 07/13] mpt3sas: Set NVMe device queue depth as 128 Date: Tue, 31 Oct 2017 18:02:33 +0530 Message-Id: <1509453159-7028-8-git-send-email-suganath-prabu.subramani@broadcom.com> X-Mailer: git-send-email 2.0.2 In-Reply-To: <1509453159-7028-1-git-send-email-suganath-prabu.subramani@broadcom.com> References: <1509453159-7028-1-git-send-email-suganath-prabu.subramani@broadcom.com> Sender: linux-scsi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Sets nvme device queue depth, name and displays device capabilities Signed-off-by: Chaitra P B Signed-off-by: Suganath Prabu S --- drivers/scsi/mpt3sas/mpt3sas_base.h | 2 +- drivers/scsi/mpt3sas/mpt3sas_scsih.c | 50 ++++++++++++++++++++++++++++++++++++ 2 files changed, 51 insertions(+), 1 deletion(-) diff --git a/drivers/scsi/mpt3sas/mpt3sas_base.h b/drivers/scsi/mpt3sas/mpt3sas_base.h index a4ec459..2d005af 100644 --- a/drivers/scsi/mpt3sas/mpt3sas_base.h +++ b/drivers/scsi/mpt3sas/mpt3sas_base.h @@ -117,7 +117,7 @@ #define MPT3SAS_RAID_MAX_SECTORS 8192 #define MPT3SAS_HOST_PAGE_SIZE_4K 12 - +#define MPT3SAS_NVME_QUEUE_DEPTH 128 #define MPT_NAME_LENGTH 32 /* generic length of strings */ #define MPT_STRING_LENGTH 64 diff --git a/drivers/scsi/mpt3sas/mpt3sas_scsih.c b/drivers/scsi/mpt3sas/mpt3sas_scsih.c index 21260bd..9006a60 100644 --- a/drivers/scsi/mpt3sas/mpt3sas_scsih.c +++ b/drivers/scsi/mpt3sas/mpt3sas_scsih.c @@ -2324,6 +2324,7 @@ scsih_slave_configure(struct scsi_device *sdev) struct MPT3SAS_DEVICE *sas_device_priv_data; struct MPT3SAS_TARGET *sas_target_priv_data; struct _sas_device *sas_device; + struct _pcie_device *pcie_device; struct _raid_device *raid_device; unsigned long flags; int qdepth; @@ -2454,6 +2455,55 @@ scsih_slave_configure(struct scsi_device *sdev) } } + /* PCIe handling */ + if (sas_target_priv_data->flags & MPT_TARGET_FLAGS_PCIE_DEVICE) { + spin_lock_irqsave(&ioc->pcie_device_lock, flags); + pcie_device = __mpt3sas_get_pdev_by_wwid(ioc, + sas_device_priv_data->sas_target->sas_address); + if (!pcie_device) { + spin_unlock_irqrestore(&ioc->pcie_device_lock, flags); + dfailprintk(ioc, pr_warn(MPT3SAS_FMT + "failure at %s:%d/%s()!\n", ioc->name, __FILE__, + __LINE__, __func__)); + return 1; + } + + qdepth = MPT3SAS_NVME_QUEUE_DEPTH; + ds = "NVMe"; + sdev_printk(KERN_INFO, sdev, + "%s: handle(0x%04x), wwid(0x%016llx), port(%d)\n", + ds, handle, (unsigned long long)pcie_device->wwid, + pcie_device->port_num); + if (pcie_device->enclosure_handle != 0) + sdev_printk(KERN_INFO, sdev, + "%s: enclosure logical id(0x%016llx), slot(%d)\n", + ds, + (unsigned long long)pcie_device->enclosure_logical_id, + pcie_device->slot); + if (pcie_device->connector_name[0] != '\0') + sdev_printk(KERN_INFO, sdev, + "%s: enclosure level(0x%04x)," + "connector name( %s)\n", ds, + pcie_device->enclosure_level, + pcie_device->connector_name); + pcie_device_put(pcie_device); + spin_unlock_irqrestore(&ioc->pcie_device_lock, flags); + scsih_change_queue_depth(sdev, qdepth); + + if (pcie_device->nvme_mdts) + blk_queue_max_hw_sectors(sdev->request_queue, + pcie_device->nvme_mdts/512); + /* Enable QUEUE_FLAG_NOMERGES flag, so that IOs won't be + ** merged and can eliminate holes created during merging + ** operation. + **/ + queue_flag_set_unlocked(QUEUE_FLAG_NOMERGES, + sdev->request_queue); + blk_queue_virt_boundary(sdev->request_queue, + ioc->page_size - 1); + return 0; + } + spin_lock_irqsave(&ioc->sas_device_lock, flags); sas_device = __mpt3sas_get_sdev_by_addr(ioc, sas_device_priv_data->sas_target->sas_address);